Journal of Real-Time Image Processing

, Volume 16, Issue 2, pp 391–411 | Cite as

Efficient reference frame compression scheme for video coding systems: algorithm and VLSI design

  • Dieison SilveiraEmail author
  • Guilherme Povala
  • Lívia Amaral
  • Bruno Zatt
  • Luciano Agostini
  • Marcelo Porto
Original Research Paper


One of the most concerning issues in current video coding systems relies on the bottleneck caused by the intense external memory access required by motion estimation. As memory access affects directly the energy consumption, this problem becomes more evident when battery-powered devices are considered. In this sense, this article presents the Double Differential Reference Frame Compressor (DDRFC), which is a low-complexity and lossless solution to compress the reference frames before storing them in the external memory. The DDRFC performs intra-block double differential coding over 64 × 64-sample blocks to prepare the data for a static Huffman coding. The DDRFC guarantees block-level random access by avoiding data dependencies between neighboring blocks. It reaches an average compression ratio of 69 % for luminance samples for 1080 p video sequences, outperforming any lossless reference frame compressor available in the current literature. Hardware architectures for both the DDRFC encoder and decoder were designed and synthesized targeting FPGA and ASIC 180 and 65-nm standard cells libraries. The synthesis results show that with 65 nm, the DDRFC architectures are able to process 2160 p video at 30 FPS or 1080 p at 120 FPS with a power dissipation of 5.01 mW. The DDRFC codec reaches more than 68 % of energy savings when considering memory communication for HD and UHD video processing.


Video coding HEVC Lossless reference frame compression Memory bandwidth reduction Hardware design Differential coding Huffman coding 



This work was partially financed by the National Council for Scientific and Technological Development (CNPq), Coordination of Improvement of Superior Education Staff (CAPES) and Research Support Foundation of Rio Grande do Sul (FAPERGS).


  1. 1.
    Cisco: Cisco Visual Networking Index: Global Mobile Data Traffic Forecast Update, 2013–2018 (2014)Google Scholar
  2. 2.
    ITU-T: Recommendation H.265: High Efficiency Video Coding, Audiovisual and Multimedia Systems (2013)Google Scholar
  3. 3.
    ITU-T: International Telecommunication Union. Recommendation H.264 (01/12): Advanced Video Coding for Generic Audiovisual Services (2012)Google Scholar
  4. 4.
    Ohm, J.-R., Sullivan, G.J., Schwarz, H., Tan, T.K., Wiegand, T.: Comparison of the coding efficiency of video coding standards—including high efficiency video coding (HEVC). IEEE Trans. Circuits Syst. Video Technol. 22(12), 1669–1684 (2012)CrossRefGoogle Scholar
  5. 5.
    Shafique, M., Henkel, J.: Low power design of the next-generation high efficiency video coding. In: Asia and South Pacific Design Automation Conference, Singapore (2014)Google Scholar
  6. 6.
    Zatt, B., Shafique, M., Sampaio, F., Agostini, L., Bampi, S., Henkel, J.: Run-time adaptive energy-aware motion and disparity estimation in multiview video coding. In: Design Automation Conference, San Diego, pp. 1026–1031 (2011)Google Scholar
  7. 7.
    Tikekar, M., Huang, C.-T., Juvekar, C., Sze, V., Chandrakasan, A.P.: A 249-Mpixel/s HEVC video-decoder chip for 4 K ultra-HD applications. IEEE J. Solid-State Circuits 49(1), 61–72 (2014)CrossRefGoogle Scholar
  8. 8.
    Bossen, F., Bross, B., Suhring, K., Flynn, D.: HEVC complexity and implementation analysis. IEEE Trans. Circuits Syst. Video Technol. 22(12), 1685–1696 (2012)CrossRefGoogle Scholar
  9. 9.
    Tuan, J.-C., Chang, T.-S., Jen, C.-W.: On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture. IEEE Trans. Circuits Syst. Video Technol. 12(1), 61–72 (2002)CrossRefGoogle Scholar
  10. 10.
    Chen, C.-Y., Huang, C.-T., Chen, Y.-H., Chen, L.-G.: Level C+ data reuse scheme for motion estimation with corresponding coding orders. IEEE Trans. Circuits Syst. Video Technol. 16(4), 553–558 (2006)CrossRefGoogle Scholar
  11. 11.
    Ivanov, Y.V., Moloney, D.: Reference frame compression using embedded reconstruction patterns for H.264/AVC decoder. In: International Conference on Digital Telecommunications, pp. 168–173 (2008)Google Scholar
  12. 12.
    Budagavi, M., Zhou, M.: Video coding using compressed reference frames. In: IEEE International Conference on Acoustics, Speech and Signal Processing, Las Vegas, NV, pp. 1165–1168 (2008)Google Scholar
  13. 13.
    Gupte, A., Amrutur, B., Mehendale, M., Rao, A., Budagavi, M.: Memory bandwidth and power reduction using lossy reference frame compression in video encoding. IEEE Trans. Circuits Syst. Video Technol. 21(2), 225–230 (2011)CrossRefGoogle Scholar
  14. 14.
    Cheng, C.-C., Tseng, P.-C., Chen, L.-G.: Multimode embedded compression codec engine for power-aware video coding system. IEEE Trans. Circuits Syst. Video Technol. 19(2), 141–150 (2009)CrossRefGoogle Scholar
  15. 15.
    Ma, Z., Segall, A.: Frame buffer compression for low-power video coding. In: IEEE International Conference on Image Processing, pp. 757–760 (2011)Google Scholar
  16. 16.
    Lee, S.-H., Chung, M.-K., Park, S.-M., Kyung, C.-M.: Lossless frame memory recompression for video codec preserving random accessibility of coding unit. IEEE Trans. Consum. Electron. 55(4), 2105–2113 (2009)CrossRefGoogle Scholar
  17. 17.
    Kim, J., Kyung, C.-M.: A lossless embedded compression using significant bit truncation for HD video coding. IEEE Trans. Circuits Syst. Video Technol. 20(6), 848–860 (2010)CrossRefGoogle Scholar
  18. 18.
    Bao, X., Zhou, D., Goto, S.: A lossless frame recompression scheme for reducing DRAM power in video encoding. In: IEEE International Symposium on Circuits and Systems, Paris, pp. 677–680 (2010)Google Scholar
  19. 19.
    Zhou, D., et al.: A 530 Mpixels/s 4096×2160@60 FPS H.264/AVC high profile video decoder chip. IEEE J. Solid-State Circuits 46(4), 777–788 (2011)CrossRefGoogle Scholar
  20. 20.
    Kuo, H.-C., Lin, Y.-L.: A hybrid algorithm for effective lossless compression of video display frames. IEEE Trans. Multimed. 14(3), 500–509 (2012)CrossRefGoogle Scholar
  21. 21.
    Guo, L., Zhou, D., Goto, S.: Lossless embedded compression using multi-mode DPCM & averaging prediction for HEVC-like video codec. In: IEEE European Signal Processing Conference, Marrakech, Morocco, pp. 1–5 (2013)Google Scholar
  22. 22.
    Zhou, D., Guo, L., Zhou, J., Goto, S.: Reducing power consumption of HEVC codec with lossless reference frame recompression. In IEEE International Conference on Image Processing, Paris (2014)Google Scholar
  23. 23.
    Lee, Y.-H., Chen, C.-C., You, Y.-L.: Design of VLSI architecture of autocorrelation-based lossless recompression engine for memory-efficient video coding systems. Circuits Syst. Signal Process. 33(2), 459–482 (2014)CrossRefGoogle Scholar
  24. 24.
    Chen, Y.-G., Lee, Y.-H., Chen, C.-C.: An efficient Multi-Directional Lossless Recompression for video coding systems. In: IEEE International Symposium on Bioelectronics and Bioinformatics, Chung Li, Taiwan, pp. 1–4 (2014)Google Scholar
  25. 25.
    Silveira, D., Povala, G., Amaral, L., Zatt, B., Agostini, L., Porto, M.: A new differential and lossless Reference Frame Variable-Length Coder: an approach for high definition video coders. In: IEEE International Conference on Image Processing, Paris, pp. 5641–5645 (2014)Google Scholar
  26. 26.
    Bossen, F.: Common Test Conditions and Software Reference Configurations—JCTVC-H1100 (2012)Google Scholar
  27. 27.
    Sullivan, G.J., Ohm, J.-R., Han, W.-J., Wiegand, T.: Overview of the high efficiency video coding (HEVC) standard. IEEE Trans. Circuits Syst. Video Technol. 22(12), 1649–1668 (2012)CrossRefGoogle Scholar
  28. 28.
    Xiph.Org Foundation. [Online].
  29. 29.
    Micron: MT42L32M32D2AC-25: 1 Gb LPDDR2. [Online]. (2014)
  30. 30.
    Micron: Technical Note: Calculating Memory System Power for LPDDR2. [Online]. (2014)
  31. 31.
    Li, X., Chen, X., Xie, X., Li, G., Zhang, L., Zhang, C., Wang, Z.: A low power, fully pipelined JPEG-LS encoder for lossless image compression. In: IEEE International Conference on Multimedia and Expo (2007)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2015

Authors and Affiliations

  • Dieison Silveira
    • 1
    • 2
    Email author
  • Guilherme Povala
    • 1
  • Lívia Amaral
    • 1
  • Bruno Zatt
    • 1
  • Luciano Agostini
    • 1
  • Marcelo Porto
    • 1
  1. 1.Group of Architectures and Integrated Circuits – GACIFederal University of Pelotas – UFPelPelotasBrazil
  2. 2.Institute of InformaticsFederal University of Rio Grande do Sul – UFRGSPorto AlegreBrazil

Personalised recommendations