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An FPGA implementation for real-time edge detection

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Abstract

The Hessian matrix-based edge detection algorithm of Dr. Carsten Steger has the advantages of high accuracy and versatility. However, this algorithm has a complex and time-consuming computation process. Large-scale Gaussian convolution also employs a large number of multipliers when implemented on a field programmable gate array (FPGA). To address these problems, an FPGA implementation for Steger’s edge detection algorithm is proposed. This implementation employs pipeline and parallel architectures at both task and data levels for data stream processing. The original kernels of Gaussian convolution are simplified with box-filter to convert the multiplication operation in the convolution into addition, subtraction, or shift operations with the concept of integral image, thereby minimizing the multiplier resources. The proposed FPGA implementation demonstrates a favorable accuracy and anti-noise capability when dealing with different degrees of blur and noise in an image. Therefore, the FPGA implementation can satisfy real-time edge detection requirements.

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References

  1. Zhang, G.J.: Machine vision. Science Press, Beijing (2007)

    Google Scholar 

  2. Marr, D., Hildreth, E.: Theory of edge detection. In: Proceedings of Royal Society of London, Series B, Biological Sciences, vol. 207, pp. 187–217 (1980)

  3. Castleman, K.R.: Digital image processing. Prentice-Hall (1996)

  4. Maini, R., Aggarwal, H.: Study and comparison of various image edge detection techniques. Int J Image Process 3, 1–60 (2009)

    Article  Google Scholar 

  5. Gonzalez, R.C., Woods, R.E.: Digital image processing. Pearson Education Inc, Prentice Hall (2008)

    Google Scholar 

  6. Roberts, L.G.: Machine perception of 3D solids. In: Optical and Electro-Optical Information Processing. MIT Press (1965)

  7. Prewitt, J.: Object enhancement and extraction. In: Lipkin, B., Rosenfeld, A. (eds.) Picture processing and psychopictorics, pp. 75–149. Academic, New York (1970)

    Google Scholar 

  8. Canny, J.F.: A computation approach to edge detection. In: IEEE Trans. Pattern Analysis and Machine Intelligence 8(6), 769–798 (1986)

  9. Xu, G.S.: Sub-pixel edge detection based on curve fitting. In: Proceedings of Information and Computing Science (ICIC ‘09), pp. 373–375 (2009)

  10. Nalwa, V.S.: Edge-detector resolution improvement by image interpolation. IEEE Trans. PAMI 9(3), 446–451 (1987)

    Article  Google Scholar 

  11. Jensen, K., Anastassiou, D.: Subpixel edge localization and the interpolation of still images. IEEE Trans. Image Process. 4(3), 285–295 (1995)

    Article  Google Scholar 

  12. Tabatabai, A.J., Mitchell, O.R.: Edge location to subpixel values in digital imagery. IEEE Trans. PAMI. 6(2), 188–201 (1984)

    Article  Google Scholar 

  13. Lyvers, E.P., Mitchell, O.R., Akey, M.L., Reeves, A.P.: Subpixel measurements using a moment-based edge operator. IEEE Trans. PAMI 11(12), 1293–1309 (1989)

    Article  Google Scholar 

  14. Steger, C.: An unbiased detector of curvilinear structures. IEEE Trans. PAMI 20(2), 113–125 (1998)

    Article  Google Scholar 

  15. Xie, F., Zhang, Y.X., Wang, S., Zhang, X.P., Li, Q.: Robust extrication method for line structured-light stripe. Optik Int J Light Elect Opt 124(23), 6400–6403 (2013)

    Article  Google Scholar 

  16. Guo, L.Q., Liao, J.B., Zhong, F.P., Dong, K.Y.: A semi-automated methodology for rock mass discontinuity trace map construction. In: Proceedings of Image Analysis and Signal Processing (IASP), pp. 1–5 (2012)

  17. Robert, M., Paindavoine, M., Gorria, P.: An edge detection ASIC for real time defect detection. 1992 Proceedings Fifth Annual IEEE International ASIC Conference and Exhibit, pp. 193–196 (1992)

  18. Chaple, G., Daruwala, R.D: Design of sobel operator based image edge detection algorithm on FPGA. International Conference on Communication and DIgnal Processing, India, pp. 788–792 (2014)

  19. Sanduja, V., Patial, R.: Sobel edge detection using parallel architecture based on FPGA. Int J Appl Inf Sys Found Comput Sci 3(4), 20–24 (2012)

    Google Scholar 

  20. Hu, Sung C.: Canny choices condense CPLD and FPGA design cycles. EDN 39(16), 91–94 (1994)

    Google Scholar 

  21. Gentsos, C., Sotiropoulou, C.L., Nikolaidis, S., Vassiliadis, N.: Real-time canny edge detection parallel implementation for FPGAs. In: IEEE Int. Conference Electronics, Circuits, and Systems, pp. 499–502 (2010)

  22. Li, X.Y., Jiang, J., Fan, Q.Y.: An improved real-time hardware architecture for Canny edge detection based on FPGA. In: Proceedings of Intelligent Control and Information Processing (ICICIP), pp. 15–17 (2012)

  23. Qian, Xu, Varadarajan, Srenivas, Chakrabarti, Chaitali: A distributed canny edge detector: algorithm and FPGA implementation. IEEE Trans. Image Process. 23(7), 2944–2960 (2014)

    Article  MathSciNet  Google Scholar 

  24. Jiang, J., Deng, J.Q., Zhang, G.J., Zhou, F.Q.: Real-time implementation of light stripe center extraction. Opt Tech 34(2), 170–173 (2008)

    Google Scholar 

  25. Bay, H., Tuytelaars, T., Gool, L.V.: SURF: speeded up robust features. In: European Conference of Computer and Vision, pp. 404–417 (2006)

Download references

Acknowledgments

This research is supported by the National Natural Science Fund of China under Grant [No. 61222304] and by the Specialized Research Fund for the Doctoral Program of Higher Education of China under Grant [No. 20121102110032]. The authors are grateful for all the valuable suggestions that they have received during the course of this work.

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Authors and Affiliations

  1. Key Laboratory of Precision Opto-Mechatronics Technology, Ministry of Education, Beihang University, Beijing, 100191, China

    Jie Jiang, Chang Liu & Sirui Ling

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  1. Jie Jiang
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  2. Chang Liu
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  3. Sirui Ling
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Correspondence to Jie Jiang.

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Jiang, J., Liu, C. & Ling, S. An FPGA implementation for real-time edge detection. J Real-Time Image Proc 15, 787–797 (2018). https://doi.org/10.1007/s11554-015-0521-7

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  • DOI: https://doi.org/10.1007/s11554-015-0521-7

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