A decomposition approach to the design of a multiferroic memory bit
The objective of this paper is to present a methodology for the design of a memory bit to minimize the energy required to write data at the bit level. By straining a ferromagnetic nickel nano-dot by means of a piezoelectric substrate, its magnetization vector rotates between two stable states defined as a 1 and 0 for digital memory. The memory bit geometry, actuation mechanism and voltage control law were used as design variables. The approach used was to decompose the overall design process into simpler sub-problems whose structure can be exploited for a more efficient solution. This method minimizes the number of fully dynamic coupled finite element analyses required to converge to a near optimal design, thus decreasing the computational time for the design process. An in-plane sample design problem is presented to illustrate the advantages and flexibility of the procedure.
Keywordsmultiferroics nano memory piezoelectric optimization
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This work was supported by both UCLA’s Center for Excellence in Engineering and Diversity (CEED) Research Intensive Series in Engineering for Underrepresented Populations (RISE-UP) scholarship funded by the Semiconductor Research Cooperation (SRC) Education Alliance (Grant No. 2009-UR-2035-G), and by the National Science Foundation (NSF) Nanosystems Engineering Research Center for Translational Applications of Nanoscale Multiferroic Systems (TANMS) Cooperative Agreement Award EEC-1160504.
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