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Reevaluating Data Stall Time with the Consideration of Data Access Concurrency

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Abstract

Data access delay has become the prominent performance bottleneck of high-end computing systems. The key to reducing data access delay in system design is to diminish data stall time. Memory locality and concurrency are the two essential factors influencing the performance of modern memory systems. However, existing studies in reducing data stall time rarely focus on utilizing data access concurrency because the impact of memory concurrency on overall memory system performance is not well understood. In this study, a pair of novel data stall time models, the L-C model for the combined effort of locality and concurrency and the P-M model for the effect of pure miss on data stall time, are presented. The models provide a new understanding of data access delay and provide new directions for performance optimization. Based on these new models, a summary table of advanced cache optimizations is presented. It has 38 entries contributed by data concurrency while only has 21 entries contributed by data locality, which shows the value of data concurrency. The L-C and P-M models and their associated results and opportunities introduced in this study are important and necessary for future data-centric architecture and algorithm design of modern computing systems.

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Authors and Affiliations

  1. Department of Computer Science, Illinois Institute of Technology, Chicago, IL, 60616-3793, U.S.A.

    Yu-Hang Liu & Xian-He Sun

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  1. Yu-Hang Liu
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  2. Xian-He Sun
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Correspondence to Yu-Hang Liu.

Additional information

Special Section on Applications and Industry

The work was supported in part by the National Science Foundation of USA under Grant Nos. CNS-1162540, CCF-0937877, and CNS-0751200.

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Liu, YH., Sun, XH. Reevaluating Data Stall Time with the Consideration of Data Access Concurrency. J. Comput. Sci. Technol. 30, 227–245 (2015). https://doi.org/10.1007/s11390-015-1517-2

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  • DOI: https://doi.org/10.1007/s11390-015-1517-2

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