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VERTAF/Multi-Core: A SysML-Based Application Framework for Multi-Core Embedded Software Development

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Abstract

Multi-core processors are becoming prevalent rapidly in personal computing and embedded systems. Nevertheless, the programming environment for multi-core processor-based systems is still quite immature and lacks efficient tools. In this work, we present a new VERTAF/Multi-Core framework and show how software code can be automatically generated from SysML models of multi-core embedded systems. We illustrate how model-driven design based on SysML can be seamlessly integrated with Intel’s threading building blocks (TBB) and the quantum framework (QF) middleware. We use a digital video recording system to illustrate the benefits of the framework. Our experiments show how SysML/QF/TBB help in making multi-core embedded system programming model-driven, easy, and efficient.

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References

  1. Akhter S. Multi-Core Programming: Increasing Performance Through Software Multi-Threading. Intel Press, 2006.

  2. OpenMP. http://www.openmp.org/, 2008.

  3. Intel Inc. http://software.intel.com/en-us/articles/intel-cilkplus/, 2010.

  4. Reinders J. Intel Threading Building Blocks: Outfitting C++ for Multi-Core Processor Parallelism. O’Reilly Media, Inc., 2007.

  5. Hsiung P A, Lin SW, Tseng C H, Lee T Y, Fu JM, See W B. VERTAF: An application framework for the design and verification of embedded real-time software. IEEE Transactions on Software Engineering, Oct. 2004, 30(10): 656–674.

    Article  Google Scholar 

  6. Rumbaugh J, Booch G, Jacobson I. The UML Reference Guide. Addison Wesley Longman, 1999.

  7. Samek M. Practical StateCharts in C/C++. CMP Books, 2002.

  8. Lee E A. The problem with threads. IEEE Computer, May 2006, 39(5): 33–42.

    Google Scholar 

  9. UML. http://www.omg.org/gettingstarted/what_is_uml.htm, 2010.

  10. SysML. http://www.omgsysml.org/, 2010.

  11. Model driven development–simplifying multicore systems deployment. Technical Report, IBM Corporation Software Group, October 2009.

  12. de Niz D, Rajkumar R. Time Weaver: A software-throughmodels framework for embedded real-time systems. In Proc. LCTES 2003, San Diego, USA, Jun. 11–13, 2003, pp.133–143.

  13. Kodase S, Wang S, Shin K G. Transforming structural model to runtime model of embedded real-time systems. In Proc. the Design Automation and Test in Europe Conference, Munich, Germany, Mar. 3–7, 2003, pp.170–175.

  14. Wang S, Kodase S, Shin K G. Automating embedded software construction and analysis with design models. In Proc. the International Conference of Euro-uRapid, Frankfurt, Germany, Dec. 2–3, 2002, pp.A/5.1-A/5.6.

  15. Piel E, Ben Atitallah R, Marquet P, Meftali S, Niar S, Etien A, Dekeyser J L, Boulet P. Gaspard2: From MARTE to systemc simulation. In Workshop on Modeling and Analyzis of Real-Time and Embedded Systems with the MARTE UML Profile (DATE2008), March 2008.

  16. Rioux L, Saunier T, Gerard S, Radermacher A, de Simone R, Gautier T, Sorel Y, Forget J, Dekeyser J L, Cuccuru A, Dumoulin C, Andre C. MARTE: A new profile RFP for the modeling and analysis of real-time embedded systems. In Workshop UML for SoC Design (DAC 2005), June 2005.

  17. Bader D, Kanade V, Madduri K. SWARM: A parallel programming framework for multi-core processors. In Proc. IPDPS 2007, Long Beach, USA, Mar. 26–30, 2007, pp.1–8.

  18. Perez J, Bellens P, Badia R, Labarta J. Cellss: Making it easier to program the cell broadband engine processor. IBM Journal of Research and Development, 2007, 51(5): 593–604.

    Article  Google Scholar 

  19. Wagner J, Jahanpanah A, Traff J. User-land work stealing schedulers: Towards a standard. In Proc. CISIS 2008, Mar. 4–7, 2008, pp.811-816.

  20. Wang F, Hsiung P A. Efficient and user-friendly verification. IEEE Transactions on Computers, January 2002, 51(1): 61-83.

    Article  MathSciNet  Google Scholar 

  21. Cantrill B, Bonwick J. Real-world concurrency. ACM Queue, September 2008, 6(5): 16–25.

    Article  Google Scholar 

  22. Tsao C C. An efficient collaborative verification methodology for multiprocessor SoC with run-time task migration [Master’s Thesis]. “National Chung Cheng University”, July 2008.

  23. Lien C H, Bai Y W, Lin M B. Estimation by software for the power consumption of streaming-media servers. IEEE Transactions on Instrumentation and Measurement, October 2007, 56(5): 1859–1870.

    Article  Google Scholar 

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Correspondence to Chao-Sheng Lin.

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Lin, CS., Lu, CH., Lin, SW. et al. VERTAF/Multi-Core: A SysML-Based Application Framework for Multi-Core Embedded Software Development. J. Comput. Sci. Technol. 26, 448–462 (2011). https://doi.org/10.1007/s11390-011-1146-3

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  • DOI: https://doi.org/10.1007/s11390-011-1146-3

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