Skip to main content
Log in

Prefetching J+-Tree: A Cache-Optimized Main Memory Database Index Structure

  • Regular Paper
  • Published:
Journal of Computer Science and Technology Aims and scope Submit manuscript

Abstract

As the speed gap between main memory and modern processors continues to widen, the cache behavior becomes more important for main memory database systems (MMDBs). Indexing technique is a key component of MMDBs. Unfortunately, the predominant indexes — B+-trees and T-trees — have been shown to utilize cache poorly, which triggers the development of many cache-conscious indexes, such as CSB+-trees and pB+-trees. Most of these cache-conscious indexes are variants of conventional B+-trees, and have better cache performance than B+-trees. In this paper, we develop a novel J + -tree index, inspired by the Judy structure which is an associative array data structure, and propose a more cache-optimized index — Prefetching J + -tree (pJ+-tree), which applies prefetching to J+-tree to accelerate range scan operations. The J+-tree stores all the keys in its leaf nodes and keeps the reference values of leaf nodes in a Judy structure, which makes J+-tree not only hold the advantages of Judy (such as fast single value search) but also outperform it in other aspects. For example, J+-trees can achieve better performance on range queries than Judy. The pJ+-tree index exploits prefetching techniques to further improve the cache behavior of J+-trees and yields a speedup of 2.0 on range scans. Compared with B+-trees, CSB+-trees, pB+-trees and T-trees, our extensive experimental study shows that pJ+-trees can provide better performance on both time (search, scan, update) and space aspects.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. Ailamaki A, DeWitt D J, Hill M D, Wood D A. DBMSs on a modern processor: Where does time go? In Proc. VLDB Conference, Edinburgh, UK, Sept. 7–10, 1999, pp.266–277.

  2. Barroso L A, Gharachorloo K, Bugnion E D. Memory system characterization of commercial workloads. In Proc. the 25th ISCA, Barcelona, Spain, June 27–July 1, 1998, pp.3–14.

  3. Keeton K, Patterson D A, He Y Q, Raphael R C, Baker W E. Performance characterization of a Quad Pentium Pro SMP using OLTP workloads. In Proc. the 25th ISCA, Barcelona, Spain, June 27–July 1, 1998, pp.15–26.

  4. Becker M, Mancheril N, Okamoto S. DBMSs on a modern processor: “Where does time go?” revisited. Technical Report, Carnegie Mellon University, USA, 2004.

  5. Rao J, Ross K A. Cache conscious indexing for decision-support in main memory. In Proc. VLDB Conference, Edinburgh, UK, Sept. 7–10, 1999, pp.78–89.

  6. Hennessy J L, Patterson D A. Computer Architecture: A Quantitative Approach. Morgan Kaufmann Publishers Inc., 2002.

  7. Boncz P, Manegold S, Kersten M L. Database architecture optimized for the new bottleneck: Memory access. In Proc. VLDB Conference, Edinburgh, UK, Sept. 7–10, 1999, pp.54–65.

  8. Rao J, Ross K A. Making B+-trees cache conscious in main memory. In Proc. ACM SIGMOD, Dallas, USA, May 16–18, 2000, pp.475–486.

  9. Shatdal A, Kant C, Naughton J F. Cache conscious algorithms for relational query processing. In Proc. VLDB Conference, Santiago, Chile, Sept. 12–15, 1994, pp.510–521.

  10. Chen S, Gibbons P B, Mowry T C. Improving index performance through prefetching. In Proc. ACM SIGMOD, Santa Barbara, USA, May 21–24, 2001, pp.235–246.

  11. Nyberg C, Barclay T, Cvetanovic Z, Gray J, Lomet D. AlphaSort: A RISC machine sort. In Proc. ACM SIGMOD, Minneapolis, USA, May 24–27, 1994, pp.233–242.

  12. Lehman T J, Carey M J. A study of index structures for main memory database management systems. In Proc. VLDB Conference, Kyoto, Japan, Aug. 25–28, 1986, pp.294–303.

  13. Baskins D. Judy functions — C libraries for creating and accessing dynamic arrays. http://judy.sourceforge.net.

  14. Comer D. The ubiquitous B-Tree. ACM Computing Surveys, 1979, 11(2): 121–137.

    Article  MATH  Google Scholar 

  15. Garcia-Molina H, Ullman J D, Widom J. Database System Implementation. Prentice Hall, 2000.

  16. Luk C K, Mowry T C. Compiler-based prefetching for recursive data structures. In Proc. the 7th ASPLOS, Cambridge, USA, Oct. 1–5, 1996, pp.222–233.

  17. Luk C K, Mowry T C. Automatic compiler-inserted prefetching for pointer-based applications. IEEE Transactions on Computers, 1999, 48(2): 134–141.

    Article  Google Scholar 

  18. IA-32 Intel architecture optimization reference manual. Intel, http://developer.intel.com.

  19. Hankins R A, Patel J M. Effect of node size on the performance of cache-conscious B+-trees. In Proc. ACM SIGMET-RICS, San Diego, USA, June 9–14, 2003, pp.283–294.

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Hua Luan.

Additional information

This work is supported by a grant from HP Lab China, and the National Natural Science Foundation of China under Grant Nos. 60496325 and 60573092.

Electronic Supplementary Material

Below is the link to the electronic supplementary material.

(PDF 86 kb)

Rights and permissions

Reprints and permissions

About this article

Cite this article

Luan, H., Du, XY. & Wang, S. Prefetching J+-Tree: A Cache-Optimized Main Memory Database Index Structure. J. Comput. Sci. Technol. 24, 687–707 (2009). https://doi.org/10.1007/s11390-009-9251-2

Download citation

  • Received:

  • Revised:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11390-009-9251-2

Keywords

Navigation