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Maximum density of quantum information in a scalable CMOS implementation of the hybrid qubit architecture

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Abstract

Scalability from single-qubit operations to multi-qubit circuits for quantum information processing requires architecture-specific implementations. Semiconductor hybrid qubit architecture is a suitable candidate to realize large-scale quantum information processing, as it combines a universal set of logic gates with fast and all-electrical manipulation of qubits. We propose an implementation of hybrid qubits, based on Si metal-oxide-semiconductor (MOS) quantum dots, compatible with the CMOS industrial technological standards. We discuss the realization of multi-qubit circuits capable of fault-tolerant computation and quantum error correction, by evaluating the time and space resources needed for their implementation. As a result, the maximum density of quantum information is extracted from a circuit including eight logical qubits encoded by the [[7, 1, 3]] Steane code. The corresponding surface density of logical qubits is 2.6 Mqubit/cm\(^2\).

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Acknowledgments

This work was partially supported by the project QuDec (Grant No.9915), funded by the Italian Ministry of Defence.

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Authors and Affiliations

  1. Dipartimento di Scienza dei Materiali, University of Milano Bicocca, Via R. Cozzi 53, 20126, Milano, Italy

    Davide Rotta & Marco Fanciulli

  2. Laboratorio MDM, IMM-CNR, Via Olivetti 2, 20864, Agrate Brianza, Italy

    Davide Rotta, Marco De Michielis, Elena Ferraro, Marco Fanciulli & Enrico Prati

  3. Istituto di Fotonica e Nanotecnologia, Consiglio Nazionale delle Ricerche, Piazza Leonardo da Vinci 32, 20133, Milano, Italy

    Enrico Prati

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  1. Davide Rotta
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Rotta, D., De Michielis, M., Ferraro, E. et al. Maximum density of quantum information in a scalable CMOS implementation of the hybrid qubit architecture. Quantum Inf Process 15, 2253–2274 (2016). https://doi.org/10.1007/s11128-016-1282-3

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