Optimization and Engineering

, Volume 17, Issue 2, pp 473–500 | Cite as

Variation-aware clock network buffer sizing using robust multi-objective optimization

  • Amin Farshidi
  • Logan Rakai
  • Laleh Behjat
  • David Westwick


Many engineering optimization problems include unavoidable uncertainties in parameters or variables. Ignoring such uncertainties when solving the optimization problems may lead to inferior solutions that may even violate problem constraints. Another challenge in most engineering optimization problems is having different conflicting objectives that cannot be minimized simultaneously. Finding a balanced trade-off between these objectives is a complex and time-consuming task. In this paper, an optimization framework is proposed to address both of these challenges. First, we exploit a self-calibrating multi-objective framework to achieve a balanced trade-off between the conflicting objectives. Then, we develop the robust counterpart of the uncertainty-aware self-calibrating multi-objective optimization framework. The significance of this framework is that it does not need any manual tuning by the designer. We also develop a mathematical demonstration of the objective scale invariance property of the proposed framework. The engineering problem considered in this paper to illustrate the effectiveness of the proposed framework is a popular sizing problem in digital integrated circuit design. However, the proposed framework can be applied to any uncertain multi-objective optimization problem that can be formulated in the geometric programming format. We propose to consider variations in the sizes of circuit elements during the optimization process by employing ellipsoidal uncertainty model. For validation, several industrial clock networks are sized by the proposed framework. The results show a significant reduction in one objective (power, on average 38 %) as well as significant increase in the robustness of solutions to the variations. This is achieved with no significant degradation in the other objective (timing metrics of the circuit) or reduction in its standard deviation which demonstrates a more robust solution.


Robust optimization Multi-objective optimization Geometric programming Clock network 


  1. Andersson A, Thiringer T (2014) Inverter losses minimization using variable switching frequency based on multi-objective optimization. In: Proceedings of ICEM, pp 789–795Google Scholar
  2. Antunes C, Oliveira E, Lima P (2014) A multi-objective GRASP procedure for reactive power compensation planning. Optim Eng 15(1):199–215CrossRefMATHGoogle Scholar
  3. Ben-Tal A, Nemirovski A (2000) Robust solutions of linear programming problems contaminated with uncertain data. Math Program 88:411–424MathSciNetCrossRefMATHGoogle Scholar
  4. Bertsimas D, Brown D, Caramanis C (2011) Theory and applications of robust optimization. SIAM Rev 53:464–501MathSciNetCrossRefMATHGoogle Scholar
  5. Boni O, Ben-Tal A, Nemirovski A (2008) Robust solutions to conic quadratic problems and their applications. Optim Eng 9(1):1–18MathSciNetCrossRefGoogle Scholar
  6. Boyd S, Kim S (2005) Geometric programming for circuit optimization. In: Proceedings of ISPD, pp 44–46Google Scholar
  7. Boyd S, Kim S, Patil D, Horowitz M (2005) Digital circuit optimization via geometric programming. Oper Res 53:899–932MathSciNetCrossRefMATHGoogle Scholar
  8. Boyd S, Vandenberghe L (2004) Convex optimization. Cambridge University Press, CambridgeCrossRefMATHGoogle Scholar
  9. Chang Y, Wang C, Chen H (2012) On construction low power and robust clock tree via slew budgeting. In: Proceedings of ISPD, pp 129–136Google Scholar
  10. Chen J, Tehranipoor M (2013) Critical paths selection and test cost reduction considering process variations. In: Proceedings of ATS, pp 259–264Google Scholar
  11. Chiang M (2005) Geometric programming for communication systems. Commun Inf Theory 2(1/2):1–154MATHGoogle Scholar
  12. Creese R (2011) Geometric programming for design and cost optimization. Morgan and Claypool Publishers, San RafaelGoogle Scholar
  13. Doolittle E, Kerivin H, Wiecek M (2009) A robust multiobjective optimization problem with application to internet routing. Technical Report TR2012 11 DKW, Clemson UniversityGoogle Scholar
  14. Ehrgott M, Ide J, Schobel A (2014) Minmax robustness for multi-objective optimization problems. Eur J Oper Res 239(1):17–31MathSciNetCrossRefGoogle Scholar
  15. Ewetz R, Koh C-K (2013) Local merges for effective redundancy in clock networks. In: Proceedings of ISPD, pp 162–167. ACMGoogle Scholar
  16. Farshidi A, Rakai L, Behjat L, Westwick D (2013) A self-tuning multi-objective optimization framework for geometric programming with gate sizing applications. In: Proceedings of GLSVLSI, pp 305–310Google Scholar
  17. Fliege J, Werner R (2014) Robust multiobjective optimization & applications in portfolio optimization. Eur J Oper Res 40(2–3):422–433MathSciNetCrossRefMATHGoogle Scholar
  18. Geoffrion AM (1967) Proper efficiency and the theory of vector maximization. J Math Anal Appl 22(3):618–630MathSciNetCrossRefMATHGoogle Scholar
  19. Hsiung K, Kim S, Boyd S (2008) Tractable approximate robust geometric programming. Optim Eng 9(2):95–118MathSciNetCrossRefMATHGoogle Scholar
  20. Hu J, Mehrotra S (2012) Robust and stochastically weighted multiobjective optimization models and reformulations. Oper Res 60(4):936–953MathSciNetCrossRefMATHGoogle Scholar
  21. ISPD 2010 high performance clock network synthesis contest. Accessed 4 Mar 2010
  22. Jagarlapudi S, Ben-Tal A, Bhattacharyya C (2013) Robust formulations for clustering-based large-scale classification. Optim Eng 14(2):225–250MathSciNetCrossRefMATHGoogle Scholar
  23. Jakobsson S, Saif-Ul-Hasnain M, Rundqvist R, Edelvik F, Andersson B, Patriksson M, Ljungqvist M, Lortet D, Wallesten J (2010) Combustion engine optimization: a multiobjective approach. Optim Eng 11(4):533–554MathSciNetCrossRefMATHGoogle Scholar
  24. Kahng AB, Kang S, Lee H (2013) Smart non-default routing for clock power reduction. In: DAC, p 91Google Scholar
  25. Kashfi F, Hatami S, Pedram M (2011) Multi-objective optimization techniques for VLSI circuits. In: Proceedings of ISQED, pp 1–8Google Scholar
  26. Kim J, Joo D, Kim T (2013) An optimal algorithm of adjustable delay buffer insertion for solving clock skew variation problem. In: Proceedings of DAC, pp 1–6Google Scholar
  27. Kuroiwa D, Lee G (2012) On robust multiobjective optimization. Vietnam J Math 234(2):305–317MathSciNetMATHGoogle Scholar
  28. Lee D, Markov I (2011) Multilevel tree fusion for robust clock networks. In: Proceedings of ICCAD, pp 632–639Google Scholar
  29. Leung S (2007) A non-linear goal programming model and solution method for the multi-objective trip distribution problem in transportation engineering. Optim Eng 8(3):277–298MathSciNetCrossRefMATHGoogle Scholar
  30. Lin M (2011) Introduction to VLSI systems: a logic, circuit, and system perspective. CRC Press, Boca RatonGoogle Scholar
  31. Lorenz R, Boyd S (2005) Robust minimum variance beamforming. IEEE Trans Signal Process 53(5):1684–1696MathSciNetCrossRefGoogle Scholar
  32. Miettinen K (1999) Nonlinear multiobjective optimization. Kluwer Academic Publishers, BostonMATHGoogle Scholar
  33. Naidu S (2015) Geometric programming formulation for gate sizing with pipelining constraints. In: Proceedings of VLSID, pp 452–457Google Scholar
  34. Ny J, Pappas G (2010) Geometric programming and mechanism design for air traffic conflict resolution. In: Proceedings of American control conference, pp 3069–3074Google Scholar
  35. Patil D, Yun S, Kim S, Cheung A, Horowitz M, Boyd S (2005) A new method for design of robust digital circuits. In: Proceedings international symposium on quality electronic design (ISQED), pp 676–681Google Scholar
  36. Rakai L, Farshidi A, Behjat L, Westwick D (2013) Buffer sizing for clock networks using robust geometric programming considering variations in buffer sizes. In: Proceedings of ISPD, pp 154–161Google Scholar
  37. Singh J, Luo Z, Sapatnekar S (2008) A geometric programming-based worst case gate sizing method incorporating spatial correlation. IEEE Trans Comput Aided Des 27(2):295–308CrossRefGoogle Scholar
  38. Su P, Li Y (2014) Design optimization of 16-nm bulk FinFET technology via geometric programming. In: Proceedings of IWCE, pp 1–4Google Scholar
  39. Yang K, Huang J, Wu Y, Wang X, Chiang M (2014) Distributed robust optimization (DRO), part i: framework and example. Optim Eng 15(1):35–67MathSciNetCrossRefMATHGoogle Scholar
  40. Zhu Q (2003) High-speed clock network design. Kluwer Academic Publishers, BostonCrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media New York 2016

Authors and Affiliations

  • Amin Farshidi
    • 1
  • Logan Rakai
    • 1
  • Laleh Behjat
    • 1
  • David Westwick
    • 1
  1. 1.University of CalgaryCalgaryCanada

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