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Nonlinear Dynamics

, Volume 93, Issue 2, pp 819–833 | Cite as

FPGA realizations of high-speed switching-type chaotic oscillators using compact VHDL codes

  • Talal Bonny
  • Ahmed S. Elwakil
Original Paper

Abstract

This paper introduces high-speed FPGA implementations of two different chaotic systems that rely on a switching-type nonlinearity. In particular, the single-switch Jerk system and the two-wing butterfly system (previously implemented only in analog form) are realized on a modular FPGA platform. For each system, two different hardware architectures are described: a parameters-independent architecture and a customized one with fixed parameters that utilizes less FPGA resources and thus has high throughput with the minimum number of clock cycles. Experimental results show that the parameters-independent architecture utilizes 70% more of the FPGA resources, while the customized one achieves a maximum clock frequency 172.5 MHz for the Jerk and 142.6 MHz for the two-wing system.

Keywords

Switching-type chaotic oscillators Digital chaos generation FPGA 

Notes

Funding

This research did not receive any specific grant from funding agencies in the public, commercial, or not-for-profit sectors.

Compliance with ethical standards

Conflict of interest

The authors declare that they have no conflict of interest.

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Copyright information

© Springer Science+Business Media B.V., part of Springer Nature 2018

Authors and Affiliations

  1. 1.Department of Electrical and Computer Engineering, College of EngineeringUniversity of SharjahSharjahUnited Arab Emirates
  2. 2.Nanoelectronics Integrated Systems Center (NISC)Nile UniversityCairoEgypt

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