Abstract
Copper pillar micro bump is one of the platform technologies, which is essentially required for 2.5D/3D chip stacking and high-density electronic components. In this study, Cu–Cu direct thermo-compression bonding (TCB) and anisotropic conductive paste (ACP) bonding methods are proposed for Ø 100 µm Cu-pillar bumped flip-chips. The process parameters including bonding temperature, bonding pressure and time are verified by die shear test and SEM/EDX cross-sectional analysis. The optimal bonding condition for TCB with regards to bonding pressure was defined to be 0.5N/bump at 300 °C or 0.3N/bump at 360 °C. In the case of ACP bonding, the minimum bonding pressure was about 0.3N/bump for gaining a seamless bonding interface.
Similar content being viewed by others
References
K.W. Lee, 3-D hetero-integration technologies for multifunctional convergence systems. J. Microelectron. Packag. Soc. 22, 11–19 (2015)
M. Gerber, C. Beddingfield, S. O’Connor, M. Yoo, M.J. Lee, D.B. Kang, S.S. Park, C. Zwenger, R. Darveaux, R. Lanzone, K.R. Park, Next generation fine pitch Cu Pillar technology—enabling next generation silicon nodes, Electronic Components and Technology Conference (ECTC), IEEE 61st, pp. 612–618 (2011)
K.Y. Au, F.X. Che, J.L. Aw, J.K. Lin, B. Boehme, F. Kuechenmeister, Thermo-compression bonding assembly process and reliabilty studies of Cu pillar bump on Cu/Low-K Chip, Electronic Components and Technology Conference (ECTC), IEEE 16th, pp. 574–578 (2014)
C.S. Tan, D.F. Lim, X.F. Ang, J. Wei, K.C. Leong, Low temperature Cu Cu thermo-compression bonding with temporary passivation of self-assembled monolayer and its bond strength enhancement. Microelectron. Reliab. 52, 321–324 (2012)
A. Shigetou, T. Itoh, M. Matsuo, N. Hayasaka, K. Okumura, T. Suga, Bumpless interconnect through ultrafine Cu electrodes by means of surface-activated bonding (SAB) method. IEEE Trans. Adv. Packag. 29(2), 218–226 (2006)
R. He, M. Fujino, M. Akaike, T. Suga, Cu/adhesive hybrid bonding at 180 °C in H-containing HCOOH Vapor ambient for 2.5D/3D integration, Electronic Components and Technology Conference (ECTC), IEEE 67st, pp. 1243–1248 (2017)
Y.S. Tang, Y.J. Chen, K.N. Chen, Wafer-level Cu–Cu bonding technology. Microelectron. Reliab. 52, 312–320 (2012)
R.I. Made, P. Lan, H.Y. Li, C.L. Gan, C.S. Tan, Effect of direct current stressing to Cu–Cu bond interface imperfection for three dimensional integrated circuits. Microelectron. Eng. 106, 149–154 (2013)
Z. Zhang, C.P. Wong, Recent advances in flip-chip underfill: materials, process, and reliability. IEEE Trans. Adv. Packag. 27(3), 515–524 (2004)
S.H. Lee, J. Sung, S.E. Kim, Dynamic flow measurements of capillary underfill through a bump array in flip chip package. Microelectron. Reliab. 50, 2078–2083 (2010)
Y.B. Kim, J. Sung, Capillary-driven micro flows for the underfill process in microelectronics packaging. J. Mech. Sci. Technol. 26(12), 3751–3759 (2012)
T.F. Yang, K.S. Kao, R.C. Cheng, J.Y. Chang, C.J. Zhan, Evaluation of Cu/SnAg microbump bonding processes for 3D integration using wafer-level underfill film. Solder. Surf. Mt. Technol. 24, 287–293 (2012)
J.S. Lee, J.K. Kim, M.S. Kim, N. Kang, J.H. Lee, Reliability of flip-chip bonded RFID die using anisotropic conductive paste hybrid material. Trans. Nonferrous Met. Soc. China 21, 175–181 (2011)
M.A. Uddin, M.O. Alam, Y.C. Chan, H.P. Chan, Adhesion strength and contact resistance of flip chip on flex packages-effect of curing degree of anisotropic conductive film. Microelectron. Reliab. 44, 505–514 (2004)
M. Teo, S.G. Mhaisalkar, E.H. Wong, P.S. Teo, C.C. Wong, K. Ong, C.F. Goh, K.L. Teh, Correlation of material properties to reliability performance of anisotropic conductive adhesive flip chip packages. IEEE Trans. Compon. Packag. Technol. 28(1), 157–164 (2005)
J. Fan, C.S. Tan, Low temperature wafer-level metal thermo-compression bonding technology for 3D integration, in Metallurgy—Advances in Materials and Processes, ed. by Y. Pardhi (Intech, Rijeka, 2012)
MIL-STD-883E, Test method standard—Microcircuits, USA, (1996)
Acknowledgements
This project has been supported by the COMET K1 center ASSIC (Austrian Smart Systems Integration Research Center). The COMET (Competence Centers for Excellent Technologies) Program is supported by BMVIT, BMWFW and the federal provinces of Carinthia and Styria.
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Ma, Y., Roshanghias, A. & Binder, A. A comparative study on direct Cu–Cu bonding methodologies for copper pillar bumped flip-chips. J Mater Sci: Mater Electron 29, 9347–9353 (2018). https://doi.org/10.1007/s10854-018-8965-8
Received:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s10854-018-8965-8