A new fabrication process of TGV substrate with silicon vertical feedthroughs using double sided glass in silicon reflow process

  • Wenyin Li
  • Dingbang Xiao
  • Xuezhong Wu
  • Zhanqiang Hou
  • Zhihua Chen
  • Xinghua Wang
  • Jian Zhou


This paper presents a new fabrication process of through glass via (TGV) substrate, which combines glass and silicon into a single wafer. By using double sided glass in silicon reflow process with a patterned silicon mold, a thick and robust TGV substrate which is difficult or timewasting to realize by single side glass reflow process could be achieved. The fabrication process and parameters are studied in details. Surfacing roughness of the TGV substrate after polishing is measured to be 3.421 nm, showing a high surface quality for anodic bonding process. Resistance of vertical feedthroughs are measured in the range of 180 to 260 Ω, indicating that the substrate can be used in a large variety of application. Finally, strength tests of the bonding interface are measured to be as high as 7.28 MPa, indicating a mechanically strong bonding.


Silicon Wafer Heat Treatment Temperature Molten Glass High Surface Quality Silicon Mold 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



This work was supported by the National Natural Science Foundation of China (NSFC, Grant No. 51505490) and carried out at the Microsystem Laboratory, College of Mechatronics and Automation, National University of Defense Technology.


  1. 1.
    M.M. Torunbalci, S.E. Alper, T. Akin, Wafer level hermetic sealing of MEMS devices with vertical feedthroughs using anodic bonding. Sens. Actuators A 224, 169–176 (2015)CrossRefGoogle Scholar
  2. 2.
    M.M. Torunbalci, S.E. Alper, T. Akin, A method for wafer level hermetic packaging of SOI-MEMS devices with embedded vertical feedthroughs using advanced MEMS process, J. Micromech. Microeng. 25, 125030 (2015)CrossRefGoogle Scholar
  3. 3.
    M.M. Torunbalci, S.E. Alper, T. Akin, Advanced MEMS process for wafer level hermetic encapsulation of MEMS devices using SOI cap wafers with vertical feedthroughs. J. Microelectromech. Syst. 24, 556–564 (2015)CrossRefGoogle Scholar
  4. 4.
    I. Savidis, S.M. Alam, A. Jain, S. Pozder, R.E. Jones, R. Chatterjee, Electrical modeling and characterization of through-silicon vias (TSVs) for 3-D integrated circuits. Microelectron. J. 41, 9–16 (2010)CrossRefGoogle Scholar
  5. 5.
    C.-T. Ko, Z.-C. Hsiao, Y.-J. Chang, P.-S. Chen, Y.-J. Hwang, H.-C. Fu et al., A wafer-level three-dimensional integration scheme with Cu TSVs based on microbump/adhesive hybrid bonding for three-dimensional memory application. IEEE Trans. Device Mater. Reliab. 12, 209–216 (2012)CrossRefGoogle Scholar
  6. 6.
    J.H. Lee, H.J. Kim, J.-Y. Song, C.W. Lee, T.H. Ha, IEEE, “A study on wafer level TSV build-up integration method,” in 2013 IEEE International 3rd Systems Integration Conference, 2013Google Scholar
  7. 7.
    S. Ogawa, S. Soda, S.-S. Lee, S. Izuo, Y. Yoshida, RF-MEMS switch with through-silicon via by the molten solder ejection method. Sens. Actuators A Phys. 181, 77–80 (2012)CrossRefGoogle Scholar
  8. 8.
    S. Shi, X. Wang, C. Xu, J. Yuan, J. Fang, S. Liu, Simulation and fabrication of two Cu TSV electroplating methods for wafer-level 3D integrated circuits packaging. Sens. Actuators A Phys. 203, 52–61 (2013)CrossRefGoogle Scholar
  9. 9.
    Z. Wang, 3-D integration and through-silicon vias in MEMS and microsensors. J. Microelectromech. Syst. 24, 1211–1244 (2015)CrossRefGoogle Scholar
  10. 10.
    J.-Y. Lee, S.-W. Lee, S.-K. Lee, and J.-H. Park, Through-glass copper via using the glass reflow and seedless electroplating processes for wafer-level RF MEMS packaging, J. Micromech. Microeng. 23, 085012 (2013)CrossRefGoogle Scholar
  11. 11.
    L. Hofmann, R. Ecke, S.E. Schulz, T. Gessner, Investigations regarding through silicon via filling for 3D integration by periodic pulse reverse plating with and without additives. Microelectron. Eng. 88, 705–708 (2011)CrossRefGoogle Scholar
  12. 12.
    S.-W. Lee, S.-K. Lee, and J.-H. Park, High-density through-wafer copper via array in insulating glass mold using reflow process, Jpn. J. Appl. Phys. 54, 047202 (2015)CrossRefGoogle Scholar
  13. 13.
    A. Benali, M. Faqir, M. Bouya, A. Benabdellah, M. Ghogho, Analytical and finite element modeling of through glass via thermal stress. Microelectron. Eng. 151, 12–18 (2016)CrossRefGoogle Scholar
  14. 14.
    A. Benali, M. Bouya, M. Faqir, A. El Amrani, M. Ghogho, A. Benali et al., “Through glass via thermomechanical analysis: geometrical parameters effect on thermal stress,” in 2013 8th International Design and Test Symposium (Idt), 2013Google Scholar
  15. 15.
    J.-H. Chien, H. Yu, C.-L. Lung, H.-C. Chang, N.-Y. Tsai, Y.-F. Chou et al., “Thermal stress aware design for stacking IC with through glass via,” in 2012 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference, ed, 2012Google Scholar
  16. 16.
    S. Cho, V. Sundaram, R.R. Tummala, Y.K. Joshi, Impact of copper through-package vias on thermal performance of glass interposers. IEEE Trans. Compon. Packag. Manuf. Technol. 5, 1075–1084 (2015)CrossRefGoogle Scholar
  17. 17.
    R.M. Haque, K.D. Wise, A glass-in-silicon reflow process for three-dimensional microsystems. J. Microelectromech. Syst. 22, 1470–1477 (2013)CrossRefGoogle Scholar
  18. 18.
    I.-J. Hyeon, C.-W. Baek, Micromachined substrate integrated waveguides with electroplated copper vias in reflowed glass substrate for millimeter-wave applications. Microelectron. Eng. 131, 19–23 (2015)CrossRefGoogle Scholar
  19. 19.
    C.-W. Lin, C.-P. Hsu, H.-A. Yang, W. C. Wang, W. Fang, “Implementation of silicon-on-glass MEMS devices with embedded through-wafer silicon vias using the glass reflow process for wafer-level packaging and 3D chip integration,” J. Micromech. Microeng. 18 (2008)Google Scholar
  20. 20.
    Y. Sun, D. Yu, R. He, F. Dai, X. Sun, L. Wan, “The development of low cost through glass via (TGV) interposer using additive method for via filling,” in 2012 13th International Conference on Electronic Packaging Technology and High Density Packaging (Icept-Hdp 2012), pp. 49–51, 2012Google Scholar
  21. 21.
    Y. Zhu, B. Chen, D. Gao, M. Qin, Q. Huang, J. Huang, A robust and low-power 2-D thermal wind sensor based on a glass-in-silicon reflow process, Microsyst. Technol. 22, 1–12 (2015)Google Scholar

Copyright information

© Springer Science+Business Media New York 2016

Authors and Affiliations

  • Wenyin Li
    • 1
  • Dingbang Xiao
    • 1
  • Xuezhong Wu
    • 1
  • Zhanqiang Hou
    • 1
  • Zhihua Chen
    • 1
  • Xinghua Wang
    • 1
  • Jian Zhou
    • 1
  1. 1.College of Mechatronics Engineering and AutomationNational University of Defense TechnologyChangshaChina

Personalised recommendations