Formation and simulation of a thermally stable NiSi FUSI gate electrode by a novel integration process

  • S. Y. Tan
  • Hsien-Chia Chiu
  • Yi-Yang Chen
  • C. L. Sung


The low resistivity nickel fully silicided (FUSI) gate have received increasing attention over the past several years due to the simply integration scheme for implementation and ease of passivation of the underlying gate dielectric for sub-65 nm/45 nm CMOS devices. A mixed-phase of nickel silicide layer was commonly observed during phase transformation. In order to obtain a thermally stable Ni-FUSI gate electrode, we developed a unique integration process to achieve NiSi phase stabilize at temperature 900 °C and delay the agglomeration of NiSi. For the first time, we established an effective way to identify the phase transformations by some nondestructive techniques such as X-ray diffraction, sheet resistance measurement and AFM analysis. The correlations between its electrical and morphological changes during Ni-Si phase transformation were presented. F-incorporation demonstrated some improvements in both morphology and phase stability of the NiSi films at high processing temperatures. Furthermore, modeling the effect of dopants in NiSi on nano-sizes MOSFETs devices was implemented by ISE-TCAD. A low threshold voltage can be tuned by pre-doping the poly-Si with Sb for sub-45 nm NFET devices.


Sheet Resistance Nickel Silicide MOSFETs Device Sheet Resistance Measurement NiSi Phase 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



The authors would like to thank W.F. Wu for technical assistance and Chiung-Chih Hsu for TEM analysis at National Nano Device Laboratories. This work was supported by the National Science Council under award no. NSC94-2218-E-034-004.


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Copyright information

© Springer Science+Business Media, LLC 2007

Authors and Affiliations

  • S. Y. Tan
    • 1
  • Hsien-Chia Chiu
    • 2
  • Yi-Yang Chen
    • 1
  • C. L. Sung
    • 3
  1. 1.Department of Electrical EngineeringChinese Culture UniversityTaipeiTaiwan, ROC
  2. 2.Graduate Institute of Materials Science and NanotechnologyChinese Culture UniversityTaipeiTaiwan, ROC
  3. 3.National Nano Device LaboratoriesHsinchuTaiwan, ROC

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