Journal of Electronic Testing

, Volume 34, Issue 3, pp 337–349 | Cite as

Dynamic Analog/RF Alternate Test Strategies Based on On-chip Learning

  • Parth Kansara
  • Sharanabasavaraja Bheema Reddy
  • Louay Abdallah
  • Ke Huang


Analog/RF alternate test schemes have been extensively studied in the past decade with the goal of replacing time-consuming and expensive specification tests with low-cost alternate measurements. A common approach in analog/RF alternate test is to build non-linear regression models to map the specification tests to alternate measurements, or to learn a pass/fail separation boundary directly in the space of alternate measurements. Among various challenges that have been discussed in alternate test, the model stationarity is a major bottle-neck that prevents test engineers from deploying it in long-term applications. In this work, we show that alternate test strategies can be implemented on-chip using analog/RF Built-In Self-Test (BIST) circuitry. Moreover, model refinement and dynamic adaptation can be achieved based on an automatic on-chip learning structure. Effectiveness of the proposed approach is demonstrated using experimental results from an RF Low Noise Amplifier (LNA) and its BIST implementation.


Analog/RF testing Alternate test On-chip learning 


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© Springer Science+Business Media, LLC, part of Springer Nature 2018

Authors and Affiliations

  1. 1.Department of Electrical and Computer EngineeringSan Diego State UniversitySan DiegoUSA
  2. 2.Dolphin IntegrationMeylan CedexFrance

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