Journal of Electronic Testing

, Volume 29, Issue 5, pp 697–714 | Cite as

A Novel Formalism for Partially Defined Asynchronous Feedback Digital Circuits



In contrast to combinational logic and master clocked sequential logical, asynchronous feedback circuits are partially defined due to analogous meta-stabilities. We present a novel formalism to exactly explore this digitally assisted analog phenomenon in order to build up a representative test bench that is able to enforce race constraints (meta-stable behavior) for non-deterministics, instabilities as well as for oscillations in feedback structures. Further, we introduce our definitions for consistently modeling under state transition graphs, we provide all entities for modeling asynchronous feedback structures and state our proposed methodology with an exemplary asynchronous circuitry. The given example is explained at a high level of abstraction, all data for revision is provided, too. The approach seems to be capable to test for meta-stabilities, analog behavior in feedback digital structures.


Asynchronous Feedback Digital Circuit Meta-stability Partial Automaton 


  1. 1.
    Alekseyev A, Khomenko V, Mokhov A, Wist D, Yakovlev A (2011) Improved parallel composition of labelled petri nets. In: 2011 11th international conference on application of concurrency to system design (ACSD), pp 131–140Google Scholar
  2. 2.
    Ament C (2005) 3. Ereignisdiskrete Systeme (Vorlesung Steuerungsentwurf für Eingebettete Systeme), Albert-Ludwigs- Universität Freiburg. [Online]. Available:
  3. 3.
    Antsaklis PJ, Koutsoukos XD, Dame N (2002) Hybrid systems control. Electr Eng 7:1–30. [Online]. Available: Google Scholar
  4. 4.
    Bertol M (1996) Effiziente Normalform-Algorithmen für Ersetzungssysteme über frei partiell kommutativen Monoiden. Ph.D. dissertation, Universität StuttgartGoogle Scholar
  5. 5.
    Bouyer P, Brinksma E, Larsen KG (2008) Optimal infinite scheduling for multi-priced timed automata. Form Methods Syst Des 32:3–23. [Online]. Available: CrossRefMATHGoogle Scholar
  6. 6.
    Brin MG (1998) Groups acting on 1-dimensional space. University BinghamtonGoogle Scholar
  7. 7.
    Cai L, Gajski D (2003) Transaction level modeling:an overview. In: First IEEE/ACM/IFIP international conference on hardware/software codesign and system synthesis, pp 19–24Google Scholar
  8. 8.
    Chen S, Hua Zhou C, Guang Ju S, Yang Li H (2010) Analysis for the composition of information flow security properties on Petri net. In: 2010 2nd international conference on information science and engineering (ICISE), pp 1859–1863Google Scholar
  9. 9.
    Choquet-Geniet A, Grolleau E (2004) Minimal schedulability interval for real-time systems of periodic tasks with offsets. Theor Comput Sci 310(1–3):117–134. [Online]. Available: MathSciNetCrossRefMATHGoogle Scholar
  10. 10.
    Collins A, Zomorodian A, Carlsson G, Guibas LJ (2004) A barcode shape descriptor for curve point cloud data. Comput Graph 28(6):881–894. [Online]. Available: CrossRefGoogle Scholar
  11. 11.
    Davoren J, Nerode A (2000) Logics for hybrid systems. In: Proceedings of the IEEE. SpringerGoogle Scholar
  12. 12.
    Diekert V (1990) Combinatorics on traces. In: Lecture notes in computer science, vol 454. Springer, New YorkGoogle Scholar
  13. 13.
    Diekert V, Vogler W (1988) Local checking of trace synchronizability. In: Chytil M, Koubek V, Janiga L (eds) Mathematical foundations of computer science 1988, ser. lecture notes in computer science, vol 324. Springer, Berlin/Heidelberg, pp 271–279CrossRefGoogle Scholar
  14. 14.
    Diekert V, Vogler W (1989) On the synchronization of traces. Math Syst Theory 22(3):161–175MathSciNetCrossRefMATHGoogle Scholar
  15. 15.
    Foley C (1996) Characterizing metastability. In: Proceedings second international symposium on advanced research in asynchronous circuits and systems 1996, pp 175–184Google Scholar
  16. 16.
    Ginosar R (2011) Metastability and synchronizers: a tutorial. Design & Test 28(5):23–35CrossRefGoogle Scholar
  17. 17.
    Ginzburg A (1968) Algebraic theory of automata. AcademicGoogle Scholar
  18. 18.
    Goldwurm M, Santini M (1998) Clique polynomials and trace monoids. Scienze dell’Informazione, Università degli Studi di Milano, Tech. Rep.Google Scholar
  19. 19.
    Haydt M, Mourad S, Terry W, Terry J (2002) A new model for metastability. In: 9th international conference on electronics, circuits and systems, 2002, vol 1, pp 413–416Google Scholar
  20. 20.
    Huang K, Bacivarov I, Hugelshofer F, Thiele L (2008) Scalably distributed SystemC simulation for embedded applications. In: International symposium on industrial embedded systems, 2008. SIES 2008, pp 271–274Google Scholar
  21. 21.
    International Technology Roadmap for Semiconductors Design (2005). [Online]. Available: Scholar
  22. 22.
    Jaffe JM (1980) Efficient scheduling of tasks without full use of processor resources. Theor Comput Sci 12(1):1–17. [Online]. Available: MathSciNetCrossRefMATHGoogle Scholar
  23. 23.
    Johnson DB (1975) Finding all the elementary circuits of a directed graph. SIAM J Comput (1):77–84. [Online]. Available: doi:10.1137/0204007Google Scholar
  24. 24.
    Khomenko V, Schaefer M, Vogler W, Wollowski R (2009) STG decomposition strategies in combination with unfolding. Acta Inform 46:433–474. [Online]. Available: MathSciNetCrossRefMATHGoogle Scholar
  25. 25.
    Koutsoukos X, He K, Lemmon M, Antsaklis P (1998) Timed Petri nets in hybrid systems: stability and supervisory control. J Discret Event Dyn Syst Theory Appl 8:137–173MathSciNetCrossRefMATHGoogle Scholar
  26. 26.
    Kwon O-H, Chwa K-Y (1999) Scheduling parallel tasks with individual deadlines. Theor Comput Sci 215(1–2):209–223. [Online]. Available: MathSciNetMATHGoogle Scholar
  27. 27.
    Li D, Chuang P, Sachdev M (2010) Comparative analysis and study of metastability on high-performance flip-flops. In: 2010 11th international symposium on quality electronic design (ISQED), pp 853–860Google Scholar
  28. 28.
    Lohrey M (1999) Das Konfluenzproblem für Spurersetzungssysteme. Ph.D. dissertation, Universität StuttgartGoogle Scholar
  29. 29.
    Lunze J (2006) Ereignisdiskrete Systeme. Oldenbourg WissenschaftsverlagGoogle Scholar
  30. 30.
    Lunze J (2008a) Automatisierungstechnik. Oldenbourg Verlag München WienGoogle Scholar
  31. 31.
    Lunze J (2008b) Fault diagnosis of discretely controlled continuous systems by means of discrete-event models. Discret Event Dyn Syst 18:181–210. [Online]. Available: MathSciNetCrossRefMATHGoogle Scholar
  32. 32.
    Nowick S, Dill D (1995) Exact two-level minimization of hazard-free logic with multiple-input changes. IEEE Trans Comput Aided Des Integr Circ Syst 14(8):986–997CrossRefGoogle Scholar
  33. 33.
    Oischinger M (2004) Entwicklung sicherheitskritischer Systeme. 1. [Online]. Available:
  34. 34.
    Rabaey JM(ed) (1998) VLSl design and implementation fuels the signal-processing revolution. IEEE (magazine) 15(1)Google Scholar
  35. 35.
    Schaefer M (2008) Advanced STG decomposition. Books on demand GmbH. [Online]. Available:
  36. 36.
    Scott P (2000) Some aspects of categories in computer science. In: Hazewinkel M (ed) ser. Handbook of algebra, vol 2. North-Holland, pp 3–77. [Online]. Available:
  37. 37.
    Steinbach B, Posthoff C (2009) Logic functions and equations: examples and exercises. Springer Publishing Company, IncorporatedGoogle Scholar
  38. 38.
    Tang T (1991) Experimental studies of metastability behaviors of sub-micron cmos asic flip flops. In: ASIC conference and exhibit, 1991. Fourth annual IEEE international proceedings, p 7–4/1–4Google Scholar
  39. 39.
    Tiwari A (2008) Abstractions for hybrid systems. Form Methods Syst Des 32:57–83. doi:10.1007/s10703-007-0044-3CrossRefMATHGoogle Scholar
  40. 40.
    Uygur G, Sattler SM (2013) Using analog meta-stabilities in asynchronously feed-backed circuits. In: edaWorkshop, vol 13. Electronic design automation (EDA). VDE Verlag GmbH, DresdenGoogle Scholar
  41. 41.
    Vachoux A, Grimm C, Einwich K (2005) Extending SystemC to support mixed discrete-continuous system modeling and simulation. In: IEEE international symposium on circuits and systems, 2005. ISCAS 2005, vol 5, pp 5166–5169Google Scholar
  42. 42.
    Wist D, Schaefer M, Vogler W, Wollowski R (2010) STG decomposition: internal communication for SI implementability. In: 2010 10th international conference on application of concurrency to system design (ACSD), pp 13–23Google Scholar
  43. 43.
    Wuttke H-D, Henke K (2003) Schaltsysteme—Eine automatenorientierte Einfhrung. Pearson StudiumGoogle Scholar
  44. 44.
    Zander HJ (1989) Logischer Entwurf binärer systeme, 3rd edn. Verlag Technik, BerlinGoogle Scholar
  45. 45.
    Zomorodian AJ (2005) Topology for computing (Cambridge monographs on applied and computational mathematics), 1st edn. Cambridge University Press, Cambridge. [Online]. Available: Google Scholar

Copyright information

© Springer Science+Business Media New York 2013

Authors and Affiliations

  1. 1.Chair of Reliable Circuits and SystemsUniversity of Erlangen-NurembergErlangenGermany

Personalised recommendations