Advertisement

Journal of Electronic Testing

, Volume 28, Issue 6, pp 777–789 | Cite as

Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach

  • M. Portela-Garcia
  • A. Lindoso
  • L. Entrena
  • M. Garcia-Valderas
  • C. Lopez-Ongil
  • N. Marroni
  • B. Pianta
  • L. Bolzani Poehls
  • F. Vargas
Article

Abstract

Nowadays, microprocessor-based system’s robustness under Single Event Effects (SEEs) represents a very important concern. A widely adopted solution to make a microprocessor-based system robust consists in modifying the application code by adding redundancy and fault tolerance capabilities. In this context, the main idea behind this paper is to evaluate a software-based technique named Optimized Embedded Signature Monitoring (OESM) using an FPGA-based fault injection technique, which is able to inject a high number of Single Event Upsets (SEUs) and Single Event Transients (SETs) in a short period of time. The obtained results demonstrated not only the increase of system’s robustness level, but also point out the remaining weak areas in the microprocessor-based system with respect to both types of SEEs.

Keywords

Software-based fault tolerance techniques FPGA-based fault injection SEU SET 

References

  1. 1.
    Avienzis A (1985) The N-version approach to fault-tolerant software. IEEE Trans Softw Eng 11(12):1491–1501CrossRefGoogle Scholar
  2. 2.
    Cheynet P, Nicolescu B, Velazco R, Rebaudengo M, Sonza Reorda M, Violante M (2000) Experimentally evaluating an automatic approach for generating safety-critical software with respect to transient errors. IEEE Trans Nucl Sci 47(6):2231–2236CrossRefGoogle Scholar
  3. 3.
    Entrena L, García-Valderas M, Fernández-Cardenal R, Portela M, López-Ongil D (2009) SET emulation considering electrical masking effects. IEEE Trans Nucl Sci 56(4):2021–2025CrossRefGoogle Scholar
  4. 4.
    Entrena L, Garcia-Valderas M, Fernandez-Cardenal R, Portela M, Lopez-Ongil C (2012) Soft error sensitivity evaluation of microprocessors by multilevel emulation-based fault injection. IEEE Trans Comp 61(3)Google Scholar
  5. 5.
    International Technology Roadmap for Semiconductors (2009) Edition (www.itrs.net)
  6. 6.
    López-Ongil C, García-Valderas M, Portela-García M, Entrena L (2007) Autonomous fault emulation: a new FPGA-based acceleration system for hardness evaluation. IEEE Trans Nucl Sci 54(1):252–261, Part 2CrossRefGoogle Scholar
  7. 7.
    Nicolaidis M (2005) Design for soft error mitigation. IEEE Trans Device Mater Reliab 5(3):405–418CrossRefGoogle Scholar
  8. 8.
    Oh N, Shirvani PP, McCluskey EJ (2002) Control-flow checking by software signatures. IEEE Trans Reliab 51(2):111–122CrossRefGoogle Scholar
  9. 9.
    PICmicro® 18C MCU Family, Reference Manual (2000) Microchip Technology Inc., ref. DS39500AGoogle Scholar
  10. 10.
    Vargas F, Rocha CA, Farina A, de Alecrim AA Jr (2007) Embedded signature monitoring based on profiling deployed software technique. IEEE Int East–west Des Test Symp, Yerevan, Armenia, pp. 230–236Google Scholar

Copyright information

© Springer Science+Business Media, LLC 2012

Authors and Affiliations

  • M. Portela-Garcia
    • 1
  • A. Lindoso
    • 1
  • L. Entrena
    • 1
  • M. Garcia-Valderas
    • 1
  • C. Lopez-Ongil
    • 1
  • N. Marroni
    • 2
  • B. Pianta
    • 2
  • L. Bolzani Poehls
    • 2
  • F. Vargas
    • 2
  1. 1.Electronic Technology DepartmentCarlos III University of MadridMadridSpain
  2. 2.School of EngineeringCatholic University of Rio Grande do Sul - PUCRSPorto AlegreBrazil

Personalised recommendations