Journal of Electronic Testing

, Volume 27, Issue 2, pp 99–108 | Cite as

Balanced Secure Scan: Partial Scan Approach for Secret Information Protection

  • Michiko Inoue
  • Tomokazu Yoneda
  • Muneo Hasegawa
  • Hideo Fujiwara


Scan-based Design-for-Testability technique is widely used to enhance the testability. However, it increases the vulnerability to attacks through scan chains for secure chips such as cryptographic circuits with embedded secret keys. This paper proposes a secure scan design method which protects the circuits containing secret information such as cryptographic circuits from scan-based side channel attacks. The proposed method prevents the leakage of secret information by partial scan design based on a balanced structure. We also guarantee the testability of both the design under test and DFT circuitry, and therefore, realize both security and testability. Experiments for RSA circuit shows the effectiveness of the proposed method.


Cryptographic circuit Partial scan Security Testability 


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Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  • Michiko Inoue
    • 1
  • Tomokazu Yoneda
    • 1
  • Muneo Hasegawa
    • 1
  • Hideo Fujiwara
    • 1
  1. 1.Nara Institute of Science and TechnologyTakayamaJapan

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