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Journal of Electronic Testing

, Volume 22, Issue 2, pp 143–150 | Cite as

Concurrent Error Detection in a Polynomial Basis Multiplier over GF(2 m )

  • Chiou-Yng Lee
  • Che Wun Chiou
  • Jim-Min Lin
Article

Abstract

Eliminating cryptographic computation errors is vital for preventing attacks. A simple approach is to verify the correctness of the cipher before outputting it. The multiplication is the most significant arithmetic operation among the cryptographic computations. Hence, a multiplier with concurrent error detection ability is urgently necessary to avert attacks. Employing the re-computing shifted operand concept, this study presents a semi-systolic array polynomial basis multiplier with concurrent error detection with minimal area overhead. Moreover, the proposed multiplier requires only two extra clock cycles while traditional multipliers using XOR trees consume at least \(\left\lceil {\log _2 m} \right\rceil\) extra XOR gate delays in GF(2 m ) fields.

Keywords

finite fields arithmetic multiplier fault-tolerant computing fault detection cryptography 

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Copyright information

© Springer Science + Business Media, LLC 2006

Authors and Affiliations

  1. 1.Department of Computer Information and Network EngineeringLunghwa University of Science and TechnologyTaoyuan CountyR.O.C.
  2. 2.Department of Computer Science and Information EngineeringChing Yun UniversityChung-LiR.O.C.
  3. 3.Department of Information Engineering and Computer ScienceFeng Chia UniversityTaichung CityR.O.C.

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