Journal of Electroceramics

, Volume 39, Issue 1–4, pp 21–38 | Cite as

Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication

  • Hong-Yu ChenEmail author
  • Stefano Brivio
  • Che-Chia Chang
  • Jacopo Frascaroli
  • Tuo-Hung Hou
  • Boris Hudec
  • Ming Liu
  • Hangbing Lv
  • Gabriel Molas
  • Joon Sohn
  • Sabina Spiga
  • V. Mani Teja
  • Elisa Vianello
  • H.-S. Philip Wong


Emerging non-volatile memory technologies are promising due to their anticipated capacity benefits, non-volatility, and zero idle energy. One of the most promising candidates is resistive random access memory (RRAM) based on resistive switching (RS). This paper reviews the development of RS device technology including the fundamental physics, material engineering, three-dimension (3D) integration, and bottom-up fabrication. The device operation, physical mechanisms for resistive switching, reliability metrics, and memory cell selector candidates are summarized from the recent advancement in both industry and academia. Options for 3D memory array architectures are presented for the mass storage application. Finally, the potential application of bottom-up fabrication approaches for effective manufacturing is introduced.


Resistive random access memory (RRAM) Resistive switching device 3D integration Selector Bottom-up fabrication 



H.-Y. Chen would like to thank Yiming Zhu and Dr. Kanyu Cao’s support for the emerging memory program in the GigaDevice Semiconductor Inc. J. Sohn and H.-S. P. Wong are supported in part by the member companies of the Non-Volatile Memory Technology Research Initiative (NMTRI) industrial affiliate program at Stanford. B. Hudec, V. M. Teja, C.-C. Chang and T.-H. Hou are supported by the Ministry of Science and Technology of Taiwan under grant: 105-2119-M-009-009/104-2911-I-009-529/106-2633-E-009-001. H. B. Lv and M. Liu are supported by the MOST of China under Grant No 2016YFA0203800 and National Natural Science Foundation of China under grants No. 61522408, 61334007. J. Frascaroli, S. Brivio and S. Spiga would like to acknowledge the partial support from the European Project NeuRAM3 (grant agreement n. 687299).


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Copyright information

© Springer Science+Business Media New York 2017
corrected publication December/2017

Authors and Affiliations

  • Hong-Yu Chen
    • 1
    • 2
    Email author
  • Stefano Brivio
    • 3
  • Che-Chia Chang
    • 4
  • Jacopo Frascaroli
    • 3
  • Tuo-Hung Hou
    • 4
  • Boris Hudec
    • 4
  • Ming Liu
    • 5
  • Hangbing Lv
    • 5
  • Gabriel Molas
    • 6
  • Joon Sohn
    • 1
  • Sabina Spiga
    • 3
  • V. Mani Teja
    • 4
  • Elisa Vianello
    • 6
  • H.-S. Philip Wong
    • 1
  1. 1.Department of Electrical Engineering and Stanford SystemX AllianceStanford UniversityStanfordUSA
  2. 2.GigaDevice Semiconductor Inc.BeijingChina
  3. 3.Laboratorio MDM, IMM-CNRAgrate BrianzaItaly
  4. 4.Department of Electronics Engineering and Institute of ElectronicsNational Chiao Tung UniversityHsinchuTaiwan
  5. 5.Key Laboratory of Microelectronics Devices and Integrated TechnologyInstitute of Microelectronics, Chinese Academy of ScienceBeijingChina
  6. 6.CEA LetiGrenobleFrance

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