Design Automation for Embedded Systems

, Volume 18, Issue 3–4, pp 279–293 | Cite as

Run-time parallelization switching for resource optimization on an MPSoC platform



The recent development of multimedia applications on mobile terminals raised the need for flexible and scalable computing platforms that are capable of providing considerable (application specific) computational performance within a low cost and a low energy budget. The MPSoC with multi-disciplinary approach, resolving application mapping, platform architecture and runtime management issues, provides such multiple heterogeneous, flexible processing elements. In MPSoC, the run-time manager takes the design time exploration information as an input and selects an active Pareto point based on quality requirement and available platform resources, where a Pareto point corresponds to a particular parallelization possibility of the target application. To use system’s scalability at best and enhance application’s flexibility a step further, the resource management and Pareto point selection decisions need to be adjustable at run-time. This research work experiment run-time Pareto point switching for the MPEG-4 encoder. The work involves design time exploration and then embedding of two parallelization possibilities of the MPEG-4 encoder into one single component and enabling run-time switching between these parallelizations, to give run-time control over adjusting performance-cost criteria and allocation deallocation of hardware resources at run-time. The new system has the capability to encode each video frame with different parallelization. The obtained results offer a number of operating points on the Pareto curve in between the previous ones at sequence encoding level. The run-time manager can improve application performance up to 50 % or can save memory bandwidth up to 15 %, according to quality request.


Resource optimization Parallelization MPEG-4 encoder MPSoC 


  1. 1.
    Baert R, De Greef E, Brockmeyer E (2008) An automatic scratch pad memory management tool and MPEG-4 encoder case study. In: 45th ACM/IEEE design automation conference (DAC 2008), June 8–13, pp 201–204 Google Scholar
  2. 2.
    Brockmeyer E (2008) Mapping of MPEG-4 encoder using MH and MPA showing the MPMH potential Google Scholar
  3. 3.
    De Florio V, Blondia C (2012) Robust and tuneable family of gossiping algorithms. In: 20th euromicro international conference on parallel, distributed and network-based processing (PDP), pp 154–161 Google Scholar
  4. 4.
    Florio VD, Blondia C (2006) The algorithm of pipelined gossiping. J Syst Archit 52(4):235–256 CrossRefGoogle Scholar
  5. 5.
    Gheorghita SV, Palkovic M, Hamers J, Vandecappelle A, Mamagkakis S, Basten T, Eeckhout L, Corporaal H, Catthoor F, Vandeputte F, de Bosschere K (2009) System-scenario-based design of dynamic embedded systems. ACM Trans Des Autom Electron Syst 14(1):3 CrossRefGoogle Scholar
  6. 6.
    IMEC Scientific Report (2007) Multi-processor system-on-chip (MPSoC).
  7. 7.
  8. 8.
    Jafri SMAH, Hemani A, Paul K, Plosila J, Tenhunen H (2011) Compact generic intermediate representation (CGIR) to enable late binding in coarse grained reconfigurable architectures. In: Proc. international conference on field programmable technology (FPT), pp 1–6 Google Scholar
  9. 9.
    Jafri SMAH, Hemani A, Paul K, Plosila J, Tenhunen H (2011) Compression based efficient and agile configuration mechanism for coarse grained reconfigurable architectures. In: Proc. international symposium on parallel and distributed processing workshops (IPDPSW), pp 290–293 Google Scholar
  10. 10.
    Joven J, Marongiu A, Angiolini F, Benini L, Micheli GD (2013) An integrated, programming model-driven framework for noc-qos support in cluster-based embedded many-cores. Parallel Comput 39(10):549–566 CrossRefGoogle Scholar
  11. 11.
    Kritikakou A, Catthoor F, Kelefouras VI, Goutis CE (2013) A systematic approach to classify design-time global scheduling techniques. ACM Comput Surv 45(2):14 CrossRefGoogle Scholar
  12. 12.
    Ma Z, Marchal P, Scarpazza D, Yang P, Wong C, Gómez JI, Himpe S, Ykman-Couvreur C, Catthoor F (2007) Systematic methodology for real-time cost-effective mapping of dynamic concurrent task-based systems on heterogeneous platforms. Springer, Berlin CrossRefGoogle Scholar
  13. 13.
    Mariani G, Avasare P, Vanmeerbeeck G, Ykman-Couvreur C, Palermo G, Silvano C, Zaccaria V (2010) An industrial design space exploration framework for supporting run-time resource management on multi-core systems. In: Design, automation & test in Europe conference & exhibition (DATE) Google Scholar
  14. 14.
    Mei B, Vernalde S, Verkest D, Man H, Lauwereins R (2003) In: Field programmable logic and application. Springer, Berlin, pp 61–70 CrossRefGoogle Scholar
  15. 15.
    Mei B, Vernalde S, Verkest D, De Man H, Lauwereins R (2004) Design methodology for a tightly coupled VLIW/reconfigurable matrix architecture: a case study Google Scholar
  16. 16.
    Mercati P, Bartolini A, Paterna F, Rosing TS, Benini L (2013) Workload and user experience-aware dynamic reliability management in multicore processors. In: The 50th annual design automation conference (DAC’13), Austin, TX, USA, May 29–June 07, 2013. ACM, New York Google Scholar
  17. 17.
    Mignolet J-Y, Baert R, Ashby TJ, Avasare P, Jang H-O, Son JC (2009) MPA: parallelizing an application onto a multicore platform made easy. IEEE MICRO 29(3):31–39 CrossRefGoogle Scholar
  18. 18.
    Nollet V, Verkestt D (2007) A quick safari through the MPSoC run-time management jungle. In: IEEE/ACM/IFIP workshop on embedded systems for real-time multimedia (ESTIMedia 2007), Oct 4–5, pp 41–46 CrossRefGoogle Scholar
  19. 19.
    Palkovic M Mapping of data intensive applications on multi-processor platforms Google Scholar
  20. 20.
    Singh AK, Shafique M, Kumar A, Henkel J (2013) Mapping on multi/many-core systems: survey of current and emerging trends. In: The 50th annual design automation conference (DAC’13), Austin, TX, USA, May 29–June 07, 2013. ACM, New York Google Scholar
  21. 21.
    Tajammul MA, Jafri SMAH, Hemani A, Plosila J, Tenhunen H (2013) Private configuration environments for efficient configuration in CGRAs. In: Proc. application specific systems architectures and processors (ASAP) Google Scholar
  22. 22.
    Wettin P, Murray J, Pande PP, Shirazi B, Ganguly A (2013) Energy-efficient multicore chip design through cross-layer approach. In: Macii E (ed) DATE. EDA Consortium/ACM, San Jose/New York, pp 725–730 CrossRefGoogle Scholar
  23. 23.
    Ykman-Couvreur C, Brockmeyer E, Nollet V, Marescaux T, Catthoor F, Corporaal H (2005) Design-time application exploration for MP-SoC customized run-time management. In: 2005 international symposium on system-on-chip. Proceedings, 17 Nov 2005, pp 66–69 CrossRefGoogle Scholar
  24. 24.
    Ykman-Couvreur C, Nollet V, Marescaux T, Brockmeyer E, Catthoor Fr; Corporaal H (2006) Pareto-based application specification for MP-SoC customized run-time management. In: International conference on embedded computer systems: architectures, modeling and simulation (IC-SAMOS 2006), pp 78–84 CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media New York 2014

Authors and Affiliations

  1. 1.IMECLeuvenBelgium
  2. 2.SSUETKarachiPakistan
  3. 3.BioCartisMechelenBelgium

Personalised recommendations