Chaos suppression for a Buck converter with the memristive load

Abstract

The memristor is a nonlinear device with a particular memory function and is widely used in various circuit researches. This work studies the peak current mode controlled (PCMC) buck converter with the memristive load at the continuous current mode (CCM). Firstly, a state equation for a buck converter with the memristive load is derived and a generic voltage-controlled memristor simulator is constructed by using a nonlinear function model; Secondly, facing the system chaos caused by changing bifurcation parameters, we introduce ramp compensation to stabilize the system at period-1. The chaos is effectively suppressed, this provides a guide for parameters choosing in buck converters with nonlinear loads in practical applications. The simulation is implemented by using MATLAB and PSIM.

Introduction

Since the birth of switching devices in the 1960s, switching converters have developed exceptionally rapidly [1]. The DC-DC converter is the essential component of building a switching power supply and has been widely used in various industries [2]. In fact, the switching converter is a strong nonlinear dynamic system, and some irregular phenomena often occur during operation, which affects the regular operation of the system [3].

In 1984, Brockett and Wood first confirmed chaos in a buck converter [4]. So far, the research of DC-DC converters has ushered in new development, where the rich nonlinear phenomena have been discovered, including period bifurcation, boundary collision bifurcation, Neimark-Sacker bifurcation, coexi-stence attractor, etc. [5, 6]. These phenomena hinder the normal stability of the system. In most practical situations, in order to ensure the stable operation, the occurrence of nonlinear phenomena should be considered to suppress in the DC-DC converter.

In many nonlinear studies of DC-DC converters, most of the studied load types are resistive loads. However, the change in load type can indeed affect the nonlinear behavior of the DC-DC converter. The literature [7] found that the inductive load in a buck-boost converter can improve the stability; The writings [8, 9] analyzed the dynamic change of the DC-DC converter with a battery load; The research [10] studied the peak current mode control of the current source load in a buck converter.

With the successful preparation of nanoscale solid-state memristors by HP Labs in 2008 [11], memristors have rapidly become the research focus in recent years. It has applied in the fields of neuromorphic computing, hardware security applications, access devices, analog circuits, etc., and memristors have a broad application prospect in the future [12, 13]. Some study found that the memristive characteristic exists in the switch resistance used as the access devices with a memory effect [14,15,16]. Recently, a memristor convolutional neural network composed entirely of hardware has been implemented [17].

Previously, Zhang et al. studied the nonlinear dynamics of boost converters with memristive loads [18]. Bao et al. concluded that the memristive load will not affect the bifurcation structure, but will widen the normal operating area and cause the output voltage dropping in buck-boost converters [19]. Ma et al. studied the slow-scale instability in voltage-mode controlled H-Bridge inverter with the memristive load [20]. As the most basic DC-DC converter, The buck converter’s nonlinear dynamic behavior with memristive load has not been studied and analyzed.

This study focuses on the nonlinear dynamics of the peak current mode controlled (PCMC) buck converter with the memristive load. The concrete contents include:

  1. (1)

    Construct a generic voltage-controlled memristor simulator based on a nonlinear function model and analyze the stability under stable DC.

  2. (2)

    Observe the dynamic behavior of the converter with the memristive load by changing the parameter reference current.

  3. (3)

    Ramp compensation is used to suppress the occurrence of chaos and make the system stable at period-1.

The implementation of memristor simulator

The essential characteristics of memristors

The memristor was proposed by Professor Chua in 1971 from the perspective of circuit symmetry [21]. Now it has been used as the fourth basic element of the circuit except the resistance, the inductance and the capacitance, shown in Fig. 1. Assume that im and vm denote as the input current and voltage of the memristor, the memristance (M) is defined as the relationship between charge q and magnetic flux ϕ:

$$M = \frac{d\phi }{{dq}}$$
(1)

According to the definition of current and Faraday law of electromagnetic induction: the relationships between current and charge, voltage and magnetic flux are, respectively:

$$\begin{gathered} \phi (t) = \int_{ - \infty }^{t} {v_{m} } (\tau )d\tau \hfill \\ q(t) = \int_{ - \infty }^{t} {i_{m} } (\tau )d\tau \hfill \\ \end{gathered}$$
(2)

From Eqs. (1) and (2), we can get:

$$\begin{gathered} v_{m} = M(q)i_{m} \\ i_{m} = W(\phi )v_{m} \\ \end{gathered}$$
(3)

where W(ϕ) is the memductance.

Equation (3) represents the constitutive relationships of the charge-controlled memristor and the magnetic-controlled memristor, respectively. The memristor can be regarded as a basic passive two-terminal element. It can remember the amount of charge flowing through it and has three essential characteristics [22]:

  1. (1)

    When driven by a bipolar periodic signal, the voltage-current relationship of the device is a pinched hysteresis loop that shrinks at the origin.

  2. (2)

    The hysteresis lobe area decreases monotonously as the excitation frequency increases from the critical frequency.

  3. (3)

    When the frequency approaches infinity, the pinched hysteresis loop shrinks into a single-valued function.

The memristor simulator based on a nonlinear function model

The voltage-controlled memristor simulator

There exists various type of nonliner models [23,24,25]. Due to the memristor not being manufactured commercially, this study uses a memristor simulator to study its nonlinear dynamic phenomenon. The currently recognized physical models of memristors are mainly divided into linear impurity drift models, window function models, and nonlinear function models [13, 26]. Nonlinear function models compose of operational amplifiers and multipliers, which can quickly and conveniently realize generic memristors that described as follows [27, 28].

$$\begin{gathered} i_{m} = W(x)v_{m} \\ \frac{dx}{{dt}} = g(x,v_{m} ) \\ \end{gathered}$$
(4)

where x is the internal state variable of the system.

A voltage-controlled memristor simulator is constructed by using a nonlinear function model. As shown in Fig. 2, the memristor simulator includes Op-Amps Op1 and Op2, resistors R1, R2, R3, multipliers mul1 and mul2, and a capacitance C1. The Op1 works as a voltage follower, and Op2, R1, R2, and C1 as an integrator.

Assume that im and vm are the input current and voltage of the memristor simulator, the circuit relationship of the memristor simulator can be expressed as:

$$i_{m} = \frac{1}{{R_{3} }}\left(1 - g_{1} g_{2} v_{p}^{2} \right)v_{m}$$
(5)
$$\frac{{dv_{p} }}{dt} = - (\frac{1}{{R_{1} C_{1} }}v_{m} + \frac{1}{{R_{2} C_{1} }}v_{p} )$$
(6)

where g1 and g2 are the gains of Mul1 and Mul2.

According to (4) and (5), we have:

$$W(v_{p} ) = \frac{1}{{R_{3} }}(1 - g_{1} g_{2} v_{p}^{2} )$$
(7)

Let, R1 = 1 kΩ, R2 = 1 kΩ, R3 = 15 Ω, C1 = 22 nF, g1 = − 0.1, g2 = 1.5, vm = 5sin(40000 πt) or vm = 5sin(20000 πt).

The analysis of the memristor simulator

The V-I curve under periodic AC of the memristor simulator is displayed as a pinched hysteresis loop through the origin and shrinks as the frequency increases, as shown in Fig. 3(a). The simulation results show that the memristor simulator has three essential characteristics. It can replace the real memristor to participate in the circuit experiment.

Because the buck converter converts a DC power supply from one voltage level to another, the memristor simulator is necessary to study the DC characteristics. Under stable DC, dvp/dt = 0, Eq. (5) can be expressed as

$$i_{m} = \frac{1}{{R_{3} }}(1 - g_{1} g_{2} \frac{{R_{2}^{2} }}{{R_{1}^{2} }}v_{m}^{2} )v_{m}$$
(8)

The DC V-I curve presents a cubic function relationship. It can be seen in Fig. 3(b) that the input voltage should be controlled as small as possible to avoid a sudden current increase caused by excessive voltage.

Study the stability of the memristor. Figure 4 shows the dynamic path of the memristor according to the state Eq. (6). It can be seen that (-R2*vm/R1, 0) on the x-axis is the fixed point of the system. The flow goes to the left when dvp/dt < 0 and to the right when dvp/dt > 0. The flow meets at the fixed point from all initial conditions, so the system is globally stable.

The PCMC buck converter with the memristive load

Referring to Fig. 5, the PCMC buck converter with the memristive load composes of a switch S, a diode D, an inductance L, a capacitance C, an RS flip-flop and a comparator. Through the periodic on and off the switch S, the voltage E provided by the DC power source is converted into a voltage v, which is less than and in the same direction as E, to power the memristive load.

In order to make the switch S turn on and off periodically, and make the output stable, it is necessary to introduce the PWM control. The clock signal connects to the SET terminal of the RS flip-flop, and the switch S is controlled to turn on. The comparator compares the inductance current i with the reference current Iref, its output connects to the RESET terminal of the RS flip-flop, and controls the switch to turn off.

According to whether the current i on the inductance L is continuous, the working mode of the buck converter can be divided into a continuous current mode (CCM) and a discontinuous current mode (DCM). Assume that the duration of each cycle is T, two operating states in CCM are as follows:

  • When the clock pulse signal comes with state 1, the RS flip-flop is set, the switch S turns on, the diode D is subjected to reverse voltage to close, and the inductance current i rises for a duration of ton.

  • When i = Iref, the state 2 reset the RS flip-flop, the switch S is turned off, and the diode D turns on under a forward voltage for a duration of toff.

Until the next clock pulse signal comes, the switch S turns on again.

According to the two Kirchhoff's laws, the state equations of the PCMC buck converter with the memristive load are written as follows:

State 1:

$$\begin{aligned} & L\frac{{di}}{{dt}} = E - v \\ & C\frac{{dv}}{{dt}} = i - \frac{1}{{R_{3} }}(1 - g_{1} g_{2} v_{p}^{2} )v \\ & C_{1} \frac{{dv_{p} }}{{dt}} = - (\frac{1}{{R_{1} }}v + \frac{1}{{R_{2} }}v_{p} ) \\ \end{aligned}$$
(9)

State 2:

$$\begin{aligned} & L\frac{{di}}{{dt}} = - v \\ & C\frac{{dv}}{{dt}} = i - \frac{1}{{R_{3} }}(1 - g_{1} g_{2} v_{p}^{2} )v \\ & C_{1} \frac{{dv_{p} }}{{dt}} = - (\frac{1}{{R_{1} }}v + \frac{1}{{R_{2} }}v_{p} ) \\ \end{aligned}$$
(10)

The inductance L can be selected according to the critical load current IOB = v(1-D)(2Lf)−1, and the capacitance C can be selected according to the output voltage ripple Δv = v(1-D)(8LCf2)−1[1], where D is the duty cycle, and f is the frequency of the buck converter.

In order to facilitate quantitative analysis and calculation, we need normalize Eqs. (9) and (10). Let,

$$\begin{gathered} x = i,y = v,z = v_{p} ,\tau = \frac{T}{{R_{3} C}} \hfill \\ a = \frac{{R_{3} C}}{L},b = R_{3} ,c = \frac{{R_{3} C}}{{R_{1} C_{1} }} \hfill \\ \end{gathered}$$

The switch S condition can be expressed as:

$$\begin{gathered} t = n\tau \\ i = Iref \\ \end{gathered}$$
(11)

With the above preparation, normalizing Eqs. (9) and (10) gives

$$\left\{ {\begin{array}{*{20}c} {\dot{x} = a(E - y)} \\ {\dot{y} = bx - (1 - g_{1} g_{2} z^{2} )y \, } \\ {\dot{z} = - c(y + z)} \\ \end{array} } \right.t \in [n\tau ,n\tau + \tau_{on} )$$
(12)
$$\left\{ {\begin{array}{*{20}c} {\dot{x} = - ay} \\ {\dot{y} = bx - (1 - g_{1} g_{2} z^{2} )y \, } \\ {\dot{z} = - c(y + z)} \\ \end{array} } \right.t \in [n\tau + \tau_{on} ,(n + 1)\tau )$$
(13)

Through the Eqs. (11), (12) and (13), the numerical simulation of the PCMC buck converter with the memristive load can be performed.

Numerical Simulation

To implement the numerical simulation by using Matlab, the Euler method is used to discretize the differential Eqs. (12), (13). The discrete rule is described as:

$$x_{n + 1} = x_{n} + f(x_{n} )\Delta t$$
(14)

The circuit parameters are specified as Table 1.

To ensure the relative calculation accuracy, a smaller calculation step Δt = 7.58e-6 should be used. The initial states of x, y, z in the state equations are defined as zero.

Selecting reference current Iref as bifurcation variable. Figure 6 shows period-doubling bifurcation behavior of the PCMC buck converter with the memristive load. It can be seen that the inductance current i has a period-doubling as Iref increases. The first bifurcation occurs near Iref = 1.684 A, then there is a narrow chaos window. At Iref = 1.778A, the inductance current i returns to period-doubling, then quickly enters quasi period, finally comes chaos.

Because the output voltage of the buck converter is a pulsation DC voltage greater than zero, the vp is always less than or equal to zero in the actual operation of the memristor simulator. For convenience of analysis, the vp value represented by z is treated as the opposite number, denoted as -z.

Take the reference currents Iref = 1.5A, 1.85A, 2.6A, respectively, to get phase portraits shown in Fig. 7.

When Iref = 1.5A, as shown in Fig. 7(a)-(d), Fig. 7(a) shows parameter i changing in the same interval, Fig. 7(b)-(d) show phase portraits being a single ring, and the system is in a stable period-1.

When Iref = 1.85A, periodic motion occurs, the system changes from period-1 to period-2, Fig. 7(e) shows that parameter i becomes two intervals, and Fig. 7(f)-(h) show that phase planes are a double ring, resulting in period-doubling bifurcation.

When Iref = 2.6A, the Fig. 7(i) shows that parameter i is irregular, the phase plane forms many uncountable tori, and the system enters chaos.

Figure 8 shows the Poincaré map under chaos. Obviously, the Poincaré section is a dense point set with layers.

The discrete iterative model of the buck converter [29] is adopted to draw the bifurcation diagram, shown in Fig. 9, it can be seen that bifurcation occurs when Iref = 0.814 under the resistance load. Period-1 to period-2 firstly, then to period-4, and the system enters chaos finally. Comparing with Fig. 5, it can be concluded that the memristive load produces a period-doubling bifurcation that is consistent with the resistive load, and the addition of the memristive load delays the bifurcation point of the reference current as the bifurcation parameter.

Simulation under ramp compensation

Ramp compensation can effectively suppress chaos in current-controlled PWM converters [30]. Figure 10(a) shows that the inductance current waveform without ramp compensation. Let D =|md|/(|md|-|mr|), referring to Fig. 10(a), when the duty ratio D > 0.5, the falling slope md is greater than the rising slope mr [31], the converter disturbance current ΔiL' increases, thereby causing system instability.

Introducing the slope compensation method, let m be the slope of the ramp compensation, as shown in Fig. 10(b), the disturbance current ΔiL' has been reduced. Let ΔiL' = -ΔiL(m-md)/(m-mr), when ΔiL' < ΔiL, the system is stable, it must meet:

$$m < \frac{1}{2}m_{d}$$
(15)

The relationship between the compensated current Icon and the reference current Iref is:

$$Icon = Iref + m(t\bmod T)$$
(16)

The PCMC buck converter with ramp compensation is shown in Fig. 11. Choosing a fixed slope m = - 1500, and also choosing Iref = 2.6A, it can be clearly observed that there is no chaos in the converter at this time, and the inductance current i is stabilized at the period-1 in Fig. 12, indicating that chaos has been suppressed.

PSIM circuit simulation

The circuit diagram for the PCMC buck converter is constructed by using the PSIM simulation software, shown in Fig. 13.

The selection of component parameters is consistent with the numerical simulation in Table 1. Comparing the simulation waveform in Fig. 14 with that in Fig. 6(b), (h), and (k), it can be seen that the phase portrait are basically the same, and the error does not exceed 0.1, which proves the effectiveness of the model.

Select Iref = 2.6A and introduce ramp compensation after 7 ms. It is observed from Fig. 15 that the inductance current is gradually suppressed from chaos to stable, and it has been stabilized at 10 ms. The output voltage changes from a large oscillation to a small amplitude change after the ramp compensation is introduced. The added ramp compensation effectively suppresses the chaotic behavior of the PCMC buck converter with the memristive load.

Conclusion

This paper focuses on the nonlinear behavior of the PCMC buck converter with the memristive load. Through the numerical analysis of its state equations, bifurcation diagrams, phase portraits, and Poincaré mappings have been made. It is found that as the bifurcation parameter (Iref) increasing, the system exhibits productive nonlinear behaviors such as period-doubling bifurcation, periodic motion, and chaos. Compared with the buck converter with the resistive load, it is found that the memristive load does not affect the bifurcation structure, and can delay the bifurcation point. Secondly, the introduced ramp compensations suppress the chaotic system to period-1, so that the stability of the system is improved. Finally, the correctness of theoretical and numerical analysis is verified by PSIM simulation. This research provides parameters choosing for buck switching power supply design in practical applications. The explored method may be extended to other power electronic systems including supercapacitors or batteries [32,33,34,35] and nonlinear circuits [36,37,38].

Fig. 1
figure1

The memristor symbol

Fig. 2
figure2

The simulator of the voltage-controlled memristor

Fig. 3
figure3

The V-I curve of the Memristor simulator

Fig. 4
figure4

Dynamic route of the memristor

Fig. 5
figure5

The PCMC buck converter with the memristive load

Fig. 6
figure6

Bifurcation diagram for the PCMC buck converter with the memristive load

Fig. 7
figure7

The system dynamic behaviors under different bifurcation parameter Iref a, e, i Time sequence graphs of different Iref; b, f, j Phase portraits in the x-y plane; c, g, k Phase portraits in the x-(-z) plane; d, h, l Phase portraits in the y-(-z) plane

Fig. 8
figure8

Poincaré mapping

Fig. 9
figure9

Bifurcation diagram under the resistance load R=10 Ω

Fig. 10
figure10

The inductance current waveform

Fig. 11
figure11

The PCMC buck converter under the memristive load with ramp compensation

Fig. 12
figure12

Matlab simulation with ramp compensation

Fig. 13
figure13

PSIM simulation circuit diagram of the PCMC buck converter with the memristive load

Fig.14
figure14

The phase portraits without ramp compensation

Fig.15
figure15

The PSIM simulation Result with ramp compensation

Table 1 Parameter specifications

References

  1. 1.

    Chen, J., & Kang, Y. (2011). Power electronic-power electronic transform and control technique. Beijing: High Education Press.

    Google Scholar 

  2. 2.

    Brown, M. (1990). Practical switching power supply design. Cambridge: Academic Press.

    Google Scholar 

  3. 3.

    Ma, X. K., Li, M., Dai, D., Zhang, H., & Zou, J. L. (2006). Reviews of research on complex behavior of power electronic circuits and systems. Transactions of China Electrotechnical Society, 021(012), 1–11.

    Google Scholar 

  4. 4.

    Brockett R.W., Wood J.R. (1984). Understanding power converterchaotic behavior mechanism in protective and abnormal modes. In Proceedings of 11th Annual International Power Electronics Conference, 14–15.

  5. 5.

    Tse, C. K., & Di Bernardo, M. (2002). Complex behavior in switching power converters. Proceedings of the IEEE, 90(5), 768–781.

    Article  Google Scholar 

  6. 6.

    Hu, W., Zhang, F. Y., Long, X. L., Chen, X. B., & Deng, W. T. (2014). Stability analysis and control of nonlinear behavior in V2 switching buck converter. Journal of Power Electronics, 14(6), 1208–1216.

    Article  Google Scholar 

  7. 7.

    Demirbas, S., Fidanboy, H., & Kurt, E. (2016). Exploration of the chaotic behaviour in a buck–boost converter depending on the converter and load elements. Journal of Electronic Materials, 45(8), 3889–3899.

    Article  Google Scholar 

  8. 8.

    Zhioua, M., El Aroudi, A., Belghith, S., Bosque-Moncusí, J. M., Giral, R., Al Hosani, K., & Al-Numay, M. (2016). Modeling, dynamics, bifurcation behavior and stability analysis of a DC–DC boost converter in photovoltaic systems. International Journal of Bifurcation and Chaos, 26(10), 1650166.

    MathSciNet  Article  Google Scholar 

  9. 9.

    Tosaka, S., Yamanaka, T., Katayama, N., Hayase, M., Dowaki, K., & Kogoshi, S. (2014). Developing a new topology for the DC-DC converter used in fuel cell-electric double layer capacitor hybrid power source system for mobile devices. International Power Electronics Conference, 2014, 1207–1213.

    Google Scholar 

  10. 10.

    Zhou, G. H., Xu, J. P., Bao, B. C., Wang, J. P., & Jin, Y. Y. (2011). Complex subharmonic oscillation phenomenon of peak current controlled buck converter with current source load. Acta Physica Sinica, 01, 51–58.

    Google Scholar 

  11. 11.

    Strukov, D. B., Snider, G. S., Stewart, D. R., & Williams, R. S. (2008). The missing memristor found. Nature, 453(7191), 80–83.

    Article  Google Scholar 

  12. 12.

    Wang, R., Yang, J., Mao, J., Wang, Z., Wu, S., Zhou, M., et al. (2020). Recent advances of volatile memristors: devices, mechanisms, and applications. Advanced Intelligent Systems, 2(9), 2000055.

    Article  Google Scholar 

  13. 13.

    Wang, X. P., Shen, Y., Wu, J. S., & Sun, J. W. (2013). Review on memristor and its applications. Acta Automatica Sinica, 39(008), 1170–1184.

    MathSciNet  Article  Google Scholar 

  14. 14.

    Chua, L. (2011). Resistance switching memories are memristors. Applied Physics A, 102, 765–783.

    Article  Google Scholar 

  15. 15.

    Valov, I., Linn, E., Tappertzhofen, S., Schmelzer, S., van den Hurk, J., Lentz, F., & Waser, R. (2013). Nanobatteries in redox-based resistive switches require extension of memristor theory. Nature Communications, 4(1), 1771.

    Article  Google Scholar 

  16. 16.

    Cha, J. H., Yang, S. Y., Oh, J., et al. (2020). Conductive- bridging random-access memories for emerging neuromorphic computing. Nanoscale, 12(27), 14339–14368.

    Article  Google Scholar 

  17. 17.

    Yao, P., Wu, H. Q., Gao, B., et al. (2020). Fully hardware- implemented memristor convolutional neural network. Nature, 577, 641–646.

    Article  Google Scholar 

  18. 18.

    Zhang, R. Y., Wu, A. G., Zhang, S. R., et al. (2018). Dynamical analysis and circuit implementation of a DC/DC single-stage boost converter with memristance load. Nonlinear Dynamics, 93, 1741–1755.

    Article  Google Scholar 

  19. 19.

    Bao, B., Zhang, X., Bao, H., Wu, P., Wu, Z., & Chen, M. (2019). Dynamical effects of memristive load on peak current mode buck-boost switching converter. Chaos, Solitons & Fractals, 122, 69–79.

    MathSciNet  Article  Google Scholar 

  20. 20.

    Liu, W., Wang, F. Q., & Ma, X. K. (2016). Slow-scale instability in voltage-mode controlled H-Bridge inverter with memristive Load. International Journal of Bifurcation and Chaos, 26(12), 1650200–1651193.

    MathSciNet  Article  Google Scholar 

  21. 21.

    Chua, L. (1971). Memristor-The missing circuit element. IEEE Transactions on Circuit Theory, 18(5), 507–519.

    Article  Google Scholar 

  22. 22.

    Adhikari, S. P., Sah, M., Kim, H., & Chua, L. (2013). Three fingerprints of memristor. IEEE Transactions on Circuits and Systems I, 60(11), 3008–3021.

    Article  Google Scholar 

  23. 23.

    Wang, D., Zhang, S., Gan, M., & Qiu, J. (2020). A novel EM identification method for Hammerstein systems with missing output data. IEEE Transactions on Industrial Informatics, 16, 2500–2508.

    Article  Google Scholar 

  24. 24.

    Wang, D., Li, L., Ji, Y., & Yan, Y. (2018). Model recovery for Hammerstein systems using the auxiliary model based orthogonal matching pursuit method. Applied Mathematical Modelling, 54, 537–550.

    MathSciNet  Article  Google Scholar 

  25. 25.

    Wang, D., Yan, Y., Liu, Y., & Ding, J. (2019). Model recovery for Hammerstein systems using the hierarchical orthogonal matching pursuit method. Journal of Computational and Applied Mathematics, 345, 135–145.

    MathSciNet  Article  Google Scholar 

  26. 26.

    Pal, I., Kumar, V., Aishwarya, N., Nayak, A., & Islam, A. (2020). A VDTA-based robust electronically tunable memristor emulator circuit. Analog Integrated Circuits and Signal Processing, 104, 47–59.

    Article  Google Scholar 

  27. 27.

    Muthuswamy, B. (2010). Implementing memristor based chaotic circuits. International Journal of Bifurcation and Chaos, 20(05), 1335–1350.

    Article  Google Scholar 

  28. 28.

    Chua, L. (2015). Everything You wish to know about memristors but are afraid to ask. Radio Engineering, 24(2), 319–368.

    Google Scholar 

  29. 29.

    Chang, C. Y., Zhao, X., Yang, F., & Wu, C. E. (2016). Bifurcation and chaos in high-frequency peak current mode Buck converter. Chinese Physics B, 25(7), 070504.

    Article  Google Scholar 

  30. 30.

    Zamani, N., Ataei, M., & Niroomand, M. (2015). Analysis and control of chaotic behavior in boost converter by ramp compensation based on Lyapunov exponents assignment: theoretical and experimental investigation. Chaos, Solitons & Fractals, 81, 20–29.

    MathSciNet  Article  Google Scholar 

  31. 31.

    He, L., Fang, Y., Li, J., & Xing, Y. (2006). Over current protection for peak current controlled DC-DC converter. Transactions of China Electrotechnical Society, 21(010), 86–89.

    Google Scholar 

  32. 32.

    Zhou, Y., Wang, Y., Wang, K., Kang, L., Peng, F., Wang, L., & Pang, J. (2020). Hybrid genetic algorithm method for efficient and robust evaluation of remaining useful life of supercapacitors. Applied Energy, 260, 114169.

    Article  Google Scholar 

  33. 33.

    Zhou, Y., Huang, Y., Pang, J., & Wang, K. (2019). Remaining useful life prediction for supercapacitor based on long short-term memory neural network. Journal of Power Sources, 440, 227149.

    Article  Google Scholar 

  34. 34.

    Jiao, M., Wang, D. Q., & Qiu, J. L. (2020). A GRU-RNN based momentum optimized algorithm for SOC estimation. Journal of Power Sources, 459, 228051.

    Article  Google Scholar 

  35. 35.

    Li, W. Q., Yang, Y., Wang, D. Q., & Yin, S. Q. (2020). The multi- innovation extended Kalman filter algorithm for battery SOC estimation. Ionics. https://doi.org/10.1007/s11581-020-03716-0.

    Article  Google Scholar 

  36. 36.

    Wang, N., Zhang, G. S., Kuznetsov, N. V., & Bao, H. (2021). Hidden attractors and multistability in a modified Chua’s circuit. Communications in Nonlinear Science and Numerical Simulation, 92, 105494.

    MathSciNet  Article  Google Scholar 

  37. 37.

    Wang, N., Zhang, G. S., & Bao, H. (2020). A Simple Autonomous Chaotic Circuit with Dead-Zone Nonlinearity. IEEE Transactions on Circuits and Systems II: Express Briefs. https://doi.org/10.1109/tcsii.2020.3005726.

    Google Scholar 

  38. 38.

    Wang, N., Zhang, G. S., & Bao, H. (2020). Infinitely many coexisting conservative flows in a 4D conservative system inspired by LC circuit. Nonlinear Dynamics, 99, 3197–3216. https://doi.org/10.1007/s11071-020-05465-1.

    Article  Google Scholar 

Download references

Acknowledgements

This work was supported by the National Natural Science Foundation of China (No. 61873138), and in part by the Taishan Scholar Project Fund of Shandong Province of China.

Author information

Affiliations

Authors

Corresponding authors

Correspondence to Qiuhua Fan or Dongqing Wang.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and Permissions

About this article

Verify currency and authenticity via CrossMark

Cite this article

Zhu, B., Fan, Q., Li, G. et al. Chaos suppression for a Buck converter with the memristive load. Analog Integr Circ Sig Process (2021). https://doi.org/10.1007/s10470-021-01799-x

Download citation

Keywords

  • Buck converter
  • Memristive load
  • Ramp compensation
  • Chaos