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Buffer insertion for delay minimization in RLC interconnects using cuckoo optimization algorithm

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Abstract

In this paper, cuckoo optimization algorithm (COA) as an efficient evolutionary algorithm is used for buffer insertion in digital circuits. Application of the COA to real problems and some benchmark functions has proven its capability of dealing with difficult optimization problems and shown its superiority in fast convergence and global optima achievement. The aim of the work is to reduce the propagation delay in resistance–inductance–capacitance (RLC) interconnects. Furthermore, inductance effects on optimal number and size of buffer are investigated. This work is performed in two case studies. Buffer insertion in RLC lines is done in case study-I. Buffer insertion in tree structured inductive interconnects is dealt in case study-II. The COA results show the considerable reduction in the propagation delay. Maximum percentage of reduction in delay is 59.78% for line, 67.67% for balanced tree and 63.75% for unbalanced tree respectively. Also, optimal area (size and number of buffers) is another result of paper that can lead to economical number of chips.

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Authors and Affiliations

  1. Electrical Engineering Department, Faculty of Engineering, Razi University, Tagh-E-Bostan, Kermanshah, 67149, Iran

    Gholamreza Karimi

  2. Science and Research Branch, Electrical and Electronics Engineering Department, Islamic Azad University, Kermanshah, Iran

    Yavar Moradi

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  1. Gholamreza Karimi
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  2. Yavar Moradi
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Correspondence to Gholamreza Karimi.

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Karimi, G., Moradi, Y. Buffer insertion for delay minimization in RLC interconnects using cuckoo optimization algorithm. Analog Integr Circ Sig Process 99, 111–121 (2019). https://doi.org/10.1007/s10470-018-1318-y

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  • DOI: https://doi.org/10.1007/s10470-018-1318-y

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