Total ionizing dose effects in junctionless accumulation mode MOSFET


In this paper, an extensive investigation of low-frequency (1/f) noise and total ionizing dose–response of junctionless accumulation mode double-gate (JAM DG) MOSFET is presented. Current–voltage (IdVg) characteristics and low-frequency noise of JAM DG MOSFET are simulated at different ionized doses and compared to different gate oxide thickness and different channel doping concentrations. A significant amount of irradiation-induced threshold voltage shift and increase in low-frequency noise is observed for different gate oxide thickness and channel doping concentration. Moreover, the irradiation-induced border trap densities are also obtained at different doses. The gamma radiation model of Sentaurus TCAD is used to get the required results.

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  1. 1.

    International technology roadmap for semiconductors,

  2. 2.

    D. Frank, R. Dennard, E. Nowak, P. Solomon, Y. Taur, H. Wong, Device scaling limits of Si MOSFETs and their application dependencies. Proc. IEEE 89(3), 259–288 (2001)

    Article  Google Scholar 

  3. 3.

    B. Yu, Y. Yuan, P.M. Asbeck, Y. Taur, Scaling of nanowire transistors. IEEE Trans. Electron Devices 55(11), 2846–2858 (2008)

    ADS  Article  Google Scholar 

  4. 4.

    H. Lin, H. Hsu, C. Su, T. Huang, A novel multiple-gate polycrystalline silicon nanowire transistor featuring an inverse-T gate. IEEE Electron Device Lett. 29(7), 718–720 (2008)

    ADS  Article  Google Scholar 

  5. 5.

    M. Im, J.W. Han, H. Lee, L.E. Yu, S. Kim, C.H. Kim, S.C. Jeon, K.H. Kim, G.S. Lee, J.S. Oh, Y.C. Park, H.M. Lee, Y.K. Coi, Multiple-gate CMOS thin-film transistor with polysilicon nanowire. IEEE Electron Device Lett. 29(1), 102–105 (2008)

    ADS  Article  Google Scholar 

  6. 6.

    I. Ferain, C.A. Colinge, J.P. Colinge, Multigate transistors as the future of classical metal–oxide–semiconductor field-effect transistors. Nature 479, 310–316 (2011)

    ADS  Article  Google Scholar 

  7. 7.

    D. Hisamoto, W.-C. Lee, J. Kedzierski, H. Takeuchi, K. Asano, C. Kuo, E. Anderson, T.-J. King, J. Bokor, C. Hu, FinFET—A self-aligned double-gate MOSFET scalable to 20 nm. IEEE Trans. Electron Devices 47(12), 2320–2325 (2000)

    ADS  Article  Google Scholar 

  8. 8.

    N. Singh, A. Agarwal, L.K. Bera, T.Y. Liow, R. Yang, S.C. Rustagi, C.H. Tung, R. Kumar, G.Q. Lo, N. Balasubramanian, D.-L. Kwong, High-performance fully depleted silicon nanowire (diameter ≤ 5 nm) gate-all-around CMOS devices. IEEE Electron Device Lett. 27(5), 383–385 (2006)

    ADS  Article  Google Scholar 

  9. 9.

    C.-W. Lee, A. Afzalian, N. DehdashtiAkhavan, R. Yan, I. Ferain, J.P. Colinge, Colinge, junctionless multigate field-effect transistor. Appl. Phys. Lett. 94, 53511 (2009)

    Article  Google Scholar 

  10. 10.

    J.P. Colinge, C.W. Lee, A. Afzalian, N.D. Akhavan, R. Yan, I. Ferain, P. Razavi, B. O’Neill, A. Blake, M. White, A.M. Kelleher, B. Mvcarthy, R. Murphy, Nanowire transistors without junctions. Nat. Nanotechnol. 5(3), 225–229 (2010)

    ADS  Article  Google Scholar 

  11. 11.

    C.W. Lee, I. Ferain, A. Afzalian, R. Yan, N.D. Akhavan, P. Razavi, J.P. Colinge, Performance estimation of junctionless multigate transistors. Solid State Electron 54(2), 97–103 (2010)

    ADS  Article  Google Scholar 

  12. 12.

    T.K. Kim, D.H. Kim, Y.G. Yoon, J.M. Moon, B.W. Hwang, D. Moon, D.W. Lee, D.E. Yoo, H.C. Hwang, J.S. Kim, Y.K. Choi, B.J. Cho, S.H. Lee, First demonstration of junctionless accumulation-mode bulk FinFETs with robust junction isolation. IEEE Trans. Electron Device Lett 34(12), 1479–1481 (2013).

    ADS  Article  Google Scholar 

  13. 13.

    T. Holtij, M. Graef, F.M. Hain, A. Kloes, B. Iniguez, Compact model for short channel junctionless accumulation mode double gate MOSFETs. IEEE Trans. Electron Devices 61(2), 288–299 (2014)

    ADS  Article  Google Scholar 

  14. 14.

    Y.S. Yu, A unified analytical current model for N- and P-type accumulation-mode (Junctionless) surrounding-gate nanowire FETs. IEEE Trans. Electron Devices 61(8), 3007–3010 (2014)

    ADS  Article  Google Scholar 

  15. 15.

    A. Goel, S. Rewari, S. Verma et al., Physics-based analytic modeling and simulation of gate-induced drain leakage and linearity assessment in dual-metal junctionless accumulation nano-tube FET (DM-JAM-TFET). Appl. Phys. A 126, 346 (2020)

    ADS  Article  Google Scholar 

  16. 16.

    H.J. Barnaby, Total-ionizing-dose effects in modern CMOS technologies. IEEE Trans. Nucl. Sci. 53(6), 3103–3121 (2006)

    ADS  Article  Google Scholar 

  17. 17.

    T.R. Oldham, F.B. McLean, Total ionizing dose effects in MOS oxides and devices. IEEE Trans. Nucl. Sci. 50(3), 483–499 (2003)

    ADS  Article  Google Scholar 

  18. 18.

    D.M. Fleetwood, Evolution of total ionizing dose effects in MOS devices with Moore’s law scaling. IEEE Trans. Nucl. Sci. 65(8), 1465–1481 (2018)

    ADS  Article  Google Scholar 

  19. 19.

    F.W. Sexton, Destructive single-event effects in semiconductor devices and ICs. IEEE Trans. Nucl. Sci. 50(3), 603–621 (2003)

    ADS  Article  Google Scholar 

  20. 20.

    D. Munteanu, J.L. Autran, V. Ferlet-Cavrois, P. Paillet, J. Baggio, K. Castellani, 3D quantum numerical simulation of single-event transients in multiple-gate nanowire MOSFETs. IEEE Trans. Nucl. Sci. 54(4), 994–1001 (2007)

    ADS  Article  Google Scholar 

  21. 21.

    D. Munteanu, J. Autran, 3-D numerical simulation of bipolar amplification in junctionless double-gate MOSFETs under heavy-ion irradiation. IEEE Trans. Nucl. Sci. 59(4), 773–780 (2012)

    ADS  Article  Google Scholar 

  22. 22.

    F. Djeffal, T. Bendib, M. Meguellati, D. Arar, M.A. Abdi, New dual-dielectric gate all around (DDGAA) RADFET dosimeter design to improve the radiation sensitivity. Proc. World Congr. Eng. 2, 917–921 (2012)

    Google Scholar 

  23. 23.

    M. Meguellati, F. Djeffal, New dual-dielectric gate all around (DDGAA) RADFET dosimeter design to improve the radiation sensitivity. Nucl. Instrum. Methods Phys. Res. Sect. A 683, 24–28 (2012)

    ADS  Article  Google Scholar 

  24. 24.

    A. Dubey, R. Narang, M. Saxena, M. Gupta, Floating Gate Junction-Less Double Gate Radiation Sensitive FET (RADFET) Dosimeter: A Simulation Study. International Workshop on Physics of Semiconductor Devices (IWPSD) (Springer, Cham, 2017), pp. 571–576

    Google Scholar 

  25. 25.

    A. Dubey, R. Narang, M. Saxena, M. Gupta, Comparative study of CMOS based dosimeter for gamma radiation. IEEE international conference on devices circuits and systems (ICDCS), IEEE, 2018, pp. 117–120

  26. 26.

    A. Dubey, A. Singh, R. Narang, M. Saxena, M. Gupta, Modeling and simulation of junctionless double gate radiation sensitive FET (RADFET) dosimeter. IEEE Trans Nanotechnol 17(1), 49–55 (2018)

    ADS  Article  Google Scholar 

  27. 27.

    B. Razavi, A study of phase noise in CMOS oscillators. IEEE J. Solid State Circuits 31, 331–343 (1996)

    ADS  Article  Google Scholar 

  28. 28.

    M. Shahmohammadi, M. Babaie, R.B. Staszewski, A 1/f noise upconversion reduction technique for voltage-biased RF CMOS oscillators. IEEE J. Solid State Circuits 51(11), 2610–2624 (2016)

    ADS  Article  Google Scholar 

  29. 29.

    T.H. Lee, A. Hajimiri, Oscillator phase noise: a tutorial. IEEE J. Solid State Circuits 35, 326–336 (2000)

    ADS  Article  Google Scholar 

  30. 30.

    D.M. Fleetwood, T.L. Meisenheimer, J.H. Scofield, 1/f noise and radiation effects in MOS devices. IEEE Trans. Electron Dev. 41, 1953–1964 (1994)

    ADS  Article  Google Scholar 

  31. 31.

    D.M. Fleetwood, Total-ionizing-dose effects, border traps, and 1/f noise in emerging MOS technologies. IEEE Trans. Nucl. Sci. 67(7), 1216–1240 (2020)

    ADS  Article  Google Scholar 

  32. 32.

    T.L. Meisenheimer, D.M. Fleetwood, Effect of radiation-induced charge on 1/f noise in MOS devices. IEEE Trans. Nucl. Sci. 37, 1696–1702 (1990)

    ADS  Article  Google Scholar 

  33. 33.

    S. Toguchi et al., Total-ionizing-dose effects on 3D sequentially integrated, fully depleted silicon-on-insulator MOSFETs. IEEE Electron Device Lett. 41(4), 637–640 (2020)

    ADS  Article  Google Scholar 

  34. 34.

    J.H. Scofield, T.P. Doerr, D.M. Fleetwood, Correlation between preirradiation 1/f noise and postirradiation oxide-trapped charge in MOS transistors. IEEE Trans. Nucl. Sci. 36, 1946–1953 (1989)

    ADS  Article  Google Scholar 

  35. 35.

    D.M. Fleetwood, Border traps and bias-temperature instabilities in MOS devices. Microelectron. Reliab. 80, 266–277 (2018)

    Article  Google Scholar 

  36. 36.

    T.L. Meisenheimer, D.M. Fleetwood, M.R. Shaneyfelt, L.C. Riewe, 1/f noise in nchannel and p-channel MOS devices through irradiation and annealing. IEEE Trans. Nucl. Sci. 38, 1297–1303 (1991)

    ADS  Article  Google Scholar 

  37. 37.

    S. Amor, N. André, V. Kilchytska, F. Tounsi, B. Mezghani, P. Gérard, Z. Ali, F. Udrea, D. Flandre, L.A. Francis, In-situ thermal annealing of on-membrane silicon-on-insulator semiconductor-based devices after high gamma dose irradiation. Nanotechnology 28(18), 184001 (2017)

    ADS  Article  Google Scholar 

  38. 38.

    D.M. Fleetwood, P.S. Winokur, R.A. Reber, T.L. Meisenheimer, J.R. Schwank, M.R. Shaneyfelt, L.C. Riewe, Effects of oxide traps, interface traps, and border traps on metal oxide-semiconductor devices. J. Appl. Phys. 73, 5058–5074 (1993)

    ADS  Article  Google Scholar 

  39. 39.

    D.-Y. Jeon, S.J. Park, M. Mouis, S. Barraud, G.-T. Kim, G. Ghibaudo, Low-frequency noise behavior of junctionlesstransistors compared to inversion-mode transistors. Solid State Electron. 81, 101–104 (2013)

    ADS  Article  Google Scholar 

  40. 40.

    D. Jang, J.W. Lee, C.W. Lee, J.P. Colinge, L. Montès, J.I. Lee, G.T. Kim, G. Ghibaudo, Low-frequency noise in junctionless multigate transistors. Appl. Phys. Lett. 98(13), 133502 (2011)

    ADS  Article  Google Scholar 

  41. 41.

    D.-Y. Jeon, S.J. Park, M. Mouis, M. Berthome, S. Barraud, G.-T. Kim, G. Ghibaudo, Revisited parameter extraction methodology for electrical characterization of junctionless transistors. Solid State Electron. 90, 86–93 (2012)

    ADS  Article  Google Scholar 

  42. 42.

    H.J. Barnaby, Total ionising dose effects in modern CMOS technologies. IEEE Trans. Nucl. Sci. 55(4), 3103–3120 (2006)

    ADS  Article  Google Scholar 

  43. 43.

    C.M. Dozier, D.M. Fleetwood, D.B. Brown, P.S. Winokur, An evaluation of low-energy X-ray and Cobalt-60 irradiations of MOS transistors. IEEE Trans. Nucl. Sci. 34(6), 1535–1539 (1987)

    ADS  Article  Google Scholar 

  44. 44.

    D. Braunig, F. Wulf, Atomic displacement and total ionising dose damage in semiconductors. Radiat. Phys. Chem. 43(1/2), 105–127 (1994)

    ADS  Article  Google Scholar 

  45. 45.

    Synopsys Sentaurus TCAD Tools 2016 User guide

  46. 46.

    M.R. Shaneyfelt, D.M. Fleetwood, J.R. Schwank, K.L. Hughes, Charge yield for cobalt-60 and 10-keV X-ray irradiations of MOS devices. IEEE Trans. Nucl. Sci. 38(6), 1187–1194 (1991).

    ADS  Article  Google Scholar 

  47. 47.

    F. B. McLean, H. E. Boesch Jr., T. R. Oldham, Electron-hole generation, transport and trapping in SiO2. Ionizing radiation effects in MOS devices and circuits (1989)

  48. 48.

    E. Chatzikyriakou, R.W. White, C.H. De Groot, Total ionizing dose, random dopant fluctuations and its combined effect in the 45 nm PDSOI node. Microelectron. Reliab. 68, 21–29 (2017)

    Article  Google Scholar 

  49. 49.

    P. M Campbell, W. C. Bogdan, Analytical models for total dose ionization effects in MOS devices. Report, August 1, 2008; United States.

  50. 50.

    H. Barnaby, M. Mclain, I. Esqueda, X.J. Chen, Modeling ionizing radiation effects in solid state materials and CMOS devices. IEEE Trans. Circuits Syst. Regular Pap 56, 1870–1883 (2009)

    MathSciNet  Article  Google Scholar 

  51. 51.

    D.M. Fleetwood, Origins of 1/f noise in electronic materials and devices: a historical perspective, in Noise in nanoscale semiconductor devices. ed. by T. Grasser (Springer, Cham , 2020).

    Google Scholar 

  52. 52.

    R. Kolarova, T. Skotnicki, J.A. Chroboczek, Low frequency noise in thin gate oxide MOSFETs. Microelectron. Reliab. 41(4), 579–585 (2001)

    Article  Google Scholar 

  53. 53.

    G. Ghibaudo, T. Boutchacha, Electrical noise and RTS fluctuations in advanced CMOS devices. Microelectron. Reliab. 42(4–5), 573–582 (2002)

    Article  Google Scholar 

  54. 54.

    H. Wong, Low-frequency noise study in electron devices: review and update. Microelectron. Reliab. 43(4), 585–599 (2003)

    Article  Google Scholar 

  55. 55.

    N. Kaushik, S. Ghosh, S. Lodha, Low-frequency noise in supported and suspended MoS2 transistors. IEEE Trans. Electron Devices 65(10), 4135–4140 (2018).

    ADS  Article  Google Scholar 

  56. 56.

    L. Yuan, L. Yurong, H. Yujuan, L. Bin, E. Yunfei, F. Wenxiao, Low-frequency noise characteristics in the MOSFET processed in 65 nm technology. J. Semicond. 37(6), 64012 (2016)

    Article  Google Scholar 

  57. 57.

    G. Ghibaud, Low-frequency noise and fluctuations in advanced CMOS devices. Noise Devices Circuits 5113, 16–28 (2003). (International Society for Optics and Photonics)

    ADS  Article  Google Scholar 

  58. 58.

    A.J. Scholten, L.F. Tiemeijer, R. van Langevelde, R.J. Havens, A.T.A. Zegers-van Duijnhoven, V.C. Venezia, Noise modeling for RF CMOS circuit simulation. IEEE Trans. Electron Devices 50(3), 618–632 (2003)

    ADS  Article  Google Scholar 

  59. 59.

    Z. Çelik-Butler, S.P. Devireddy, H.H. Tseng, P. Tobin, A. Zlotnicka, A low-frequency noise model for advanced gatestack MOSFETs. Microelectron. Reliab. 49(2), 103–112 (2009)

    Article  Google Scholar 

  60. 60.

    P. Kushwaha, H. Agarwal, C. K. Dabhi, Y. K. Lin, J. P. Duarte, C. Hu, Y. S. Chauhan, A Unified Flicker Noise Model for FDSOI MOSFETs Including Back-bias Effect. 2018 IEEE international conference on electronics, computing and communication technologies (CONECCT), Bangalore, 2018, pp. 1–5, doi:

  61. 61.

    H. Chin, M.L. Chiu, C.H. Chou, H.L. Cheng, Kao, and C. L. Cho, , Effect of body bias and temperature on low-frequency noise in 40-nm nMOSFETs. Microelectron. Reliab. 78, 267–271 (2017)

    Article  Google Scholar 

  62. 62.

    S.A. Francis, A. Dasgupta, D.M. Fleetwood, Effects of total dose irradiation on the gate-voltage dependence of the 1/f noise of nMOS and pMOS transistors. IEEE Trans. Electron Devices 57(2), 503–510 (2010)

    ADS  Article  Google Scholar 

  63. 63.

    D.M. Fleetwood, Border traps in MOS devices. IEEE Trans. Nucl. Sci. 39, 269–271 (1992)

    ADS  Article  Google Scholar 

  64. 64.

    D.M. Fleetwood, P.S. Winokur, R.A. Reber Jr., T.L. Meisenheimer, J.R. Schwank, M.R. Shaneyfelt, L.C. Riewe, Effects of oxide traps, interface traps and border traps on MOS devices. J. Appl. Phys. 73(10), 5058–5074 (1993)

    ADS  Article  Google Scholar 

  65. 65.

    D.M. Fleetwood, M.R. Shaneyfelt, L.C. Riewe, P.S. Winokur, R.A. Reber, The role of border traps in MOS high-temperature postirradiation annealing response. IEEE Trans. Nucl. Sci. 40(6), 1323–1334 (1993)

    ADS  Article  Google Scholar 

  66. 66.

    C. Zhang, F. Jazaeri, A. Pezzatta, C. Bruschini, G. Borghello, F. Faccio, S. Mattiazzo, A. Baschirotto, C. Enz, Characterization of gigarad total ionizing dose and annealing effects on 28-nm bulk MOSFETs. IEEE Trans. Nucl. Sci. 64(10), 2639–2647 (2017).

    ADS  Article  Google Scholar 

  67. 67.

    J.H. Scofield, N. Borland, D.M. Fleetwood, Physical basis for nondestructive tests of MOS radiation hardness. IEEE Trans. Nucl. Sci. 38(6), 1567–1577 (1991)

    ADS  Article  Google Scholar 

  68. 68.

    D.M. Fleetwood, J.H. Scofield, Evidence that similar point defects cause 1/f noise and radiation-induced-hole trapping in MOS transistors. Phys. Rev. Lett. 64(5), 579–582 (1990)

    ADS  Article  Google Scholar 

  69. 69.

    P. McWhorter, P.S. Winokur, Simple technique for separating the effects of interface traps and trapped-oxide charge in metal-oxide-semiconductor transistors. Appl. Phys. Lett. 48(2), 133–135 (1986)

    ADS  Article  Google Scholar 

  70. 70.

    G. Risti’c, A. Jakˇsi’c, M. Pejovi’c, pMOSdosimetric transistors with two-layer gate oxide. Sens. Actuators A. Phys. A 63, 129–134 (1997)

    Article  Google Scholar 

  71. 71.

    A. Kahraman, E. Yilmaz, Evaluation of the pre-irradiation electrical characteristics of the RadFET dosimeters with diverse gate oxides by TCAD simulation program. Sakarya Üniversitesi Fen Bilimleri Enstitüsü Dergisi 21(6), 1258–1265 (2017)

    Google Scholar 

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Authors wish to thank the Department of Electronic Science, University of Delhi and Avashesh Dubey; CSIR-SRF would like to thank Council of Scientific and Industrial Research (CSIR) [File no: 09/045(1702)119EMR-I] for providing necessary fund during the course of this work.

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Dubey, A., Narang, R., Saxena, M. et al. Total ionizing dose effects in junctionless accumulation mode MOSFET. Appl. Phys. A 127, 189 (2021).

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  • Junctionless accumulation mode MOSFET
  • Gamma radiation
  • Total ionizing dose (TID)
  • Border traps
  • Low-frequency noise
  • Sentaurus TCAD
  • Dosimeter
  • Radiation reliability