There are various applications in which a Global Positioning System (GPS) sensor only down-converts and digitizes the received GPS signal and sends the digitized data to a processor, where the processor software performs all the correlation, search/track operations, navigation solution, and so on. Among the applications are military and commercial ones (e. g., GPS(Communication handheld sets, people tracking systems).
A major problem with the Software GPS Receiver is the large computing resources required for correlation or acquisition of the GPS signal. In this article, several possible approaches for reducing computing resources will be introduced and analyzed.
It will be shown that the performance of the GPS software design strongly depends on the features of the computer hardware. Implementations will be described on the TMS320C6201 processor and the Pentium II.
Experimental results will be demonstrated by processing of real GPS signals. A complete 16-channel GPS receiver was implemented on the single TMS320C6201 processor in real-time mode and on the Pentium II processor with a duty cycle of about 50%. © 2000 John Wiley & Sons, Inc.
KeywordsGlobal Position System Duty Cycle Computing Resource Global Position System Computer Hardware
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