Journal of Computer Science and Technology

, Volume 17, Issue 1, pp 28–37 | Cite as

A new synchronization algorithm for VHDL-AMS simulation

  • Liyi Xiao
  • Yizheng Ye
  • Bin Li
Regular Papers


VHDL-AMS is the Analog and Mixed-Signal Extensions to VHDL. The paper gives a brief overview of the added features to VHDL. A mixed-signal simulator has been developed based on VHDL-AMS. A new synchronization algorithm is adopted in the simulator. Using the new algorithm the analog kernel does not need to synchronize the digital kernel at each digital event time point. The efficiency of the new synchronization algorithm is tested by examples. Simulation results show the newly developed algorithm can speed up the simulation.


synchronization algorithm mixed-signal simulation VHDL-AMS 


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Copyright information

© Science Press, Beijing China and Allerton Press Inc. 2002

Authors and Affiliations

  • Liyi Xiao
    • 1
  • Yizheng Ye
    • 1
  • Bin Li
    • 1
  1. 1.Microelectronics CenterHarbin Institute of TechnologyHarbinP.R. China

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