Out-of-order execution in sequentially consistent shared-memory systems: Theory and experiments
- 30 Downloads
Traditional implementation of sequential consistency in shared-memory systems requires memory accesses to be globally performed in program order. Based on an event ordering model for correct executions in shared-memory systems, this paper proposes and proves that out-of-order execution does not influence the correctness of an execution providing certain condition is met. Simulation results show that out-of-order execution proposed in this paper is an effective way to improve the performance of a sequentially consistent shared-memory system.
KeywordsShared memory sequential consistency event ordering write atomic, out-of-order execution, simulation
Unable to display preview. Download preview PDF.
- Gharachorloo K, Lenoski D, Laudon Jet al. Memory consistency and event ordering in scalable shared-memory multiprocessors. InProceedings of the 17th Annual International Symposium on Computer Architecture, 1990, pp.15–26.Google Scholar
- Scheurich C, Dubois M. Correct memory operation of cached-based multiprocessors. InProceedings of the 14th Annual International Symposium on Computer Architecture, 1987, pp.234–243.Google Scholar
- Coller W. Reasoning About Parallel Architectures. Englewood Cliffs (ed.), NJ: Prentice-Hall, 1992.Google Scholar
- Tomasevic M, Milutinovic V. A simulation study of snoopy cache coherence protocols. InProceedings of the 25th Hawaii International Conference on System Sciences, 1992, pp.427–436.Google Scholar
- Dubios M, Scheurich C, Briggs F. Memory access buffering in multiprocessors. InProceedings of the 13th International Symposium on Computer Architecture, 1986, pp.434–442.Google Scholar
- Adve S, Hill M. Weak Ordering: A new definition. InProceedings of the 17th Annual International Symposium on Computer Architecture, 1990, pp.1–14.Google Scholar
- Goodman J. Cache Consistency and sequential consistency.Technical Report No. 61, SCI Committee, March 1989.Google Scholar
- Gharachorloo K, Gupta A, Hennessy J. Two techniques to enhance the performance of memory consistency models. InProceedings of the 1991 International Conference on Parallel Processing, 1991, pp.I-335-I-364.Google Scholar
- Herbert B. Enderton. Elements of Set Theory. London: Academic Press, Inc. Ltd., 1977.Google Scholar
- Lenoski D, Laudon J, Gharachorloo Get al. The directory-based cache coherence protocol for the DASH multiprocessors. InProceedings of the 17th Annual International Symposium on Computer Architecture, 1990, pp.148–158.Google Scholar