Abstract
This paper presents a functional language for the unambiguous description of digital circuits, a method and algorithms to obtain a standard-cell layout, and a comparative evaluation of the developed functional standard-cell placement technique. The presented placement scheme is different from traditional methods because the complete layout geometry is specified and constructed automatically from a functional description. The construction relies on a translation that combines the simplicity of standard-cells with the elegance of functional programming. An evaluation of the method introduced shows that the quality of the resulting placement is close to the results achieved with simulated annealing while the computation time is significantly less. Furthermore, the evaluation suggests to employ the functional placement method in conjunction with low-temperature simulated annealing for running-time reduction and improved-results.
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Klaus, B. Standard-cell placement from functional descriptions. J. of Compt. Sci. & Technol. 6, 37–46 (1991). https://doi.org/10.1007/BF02943406
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DOI: https://doi.org/10.1007/BF02943406