Abstract
With the advent of optical fiber and other advanced technologies in solid state, pipelining signals at the wire (or transmission line) level has become possible. this has, in turn, made the slotted bus a potential candidate for interconnection networks (IN) for tightly coupled multiprocessor systems. However, a bus can provide only limited bandwidth. Though slotted bus can provide considerably more bandwidth in comparison to the traditional non-slotted bus, it is not enough for fine-grain parallel applications run on the shared-memory systems. One well known method to increase the effective bandwidth of a slotted bus in the LAN/MAN environment is to reuse the bandwidth by reusing slots. However, in a tightly coupled environment reusing slots is not a lucrative option because the significant buffering needs arising from slot reuse will introduce intolerable delay. In this paper we propose a methodology to reuse part of the bandwidth available from temporal and spectral bandwidth expansion with none or minimum buffering delay, resulting in significant performance improvement inboth the effective throughput and response time (communication latency). The proposed method entails the design and analysis of a re-configurable bus structure with both temporal and spectral bandwidth expansion and a polynomial time algorithm for optimal configurations for given traffic conditions. We have compared the performance of our reconfigured bus with that of the traditional slotted bus for uniform and localized traffic pattern and found that the reconfigured bus outperforms the traditional slotted bus substantially in many practical scenarios.
Similar content being viewed by others
References
Bhuyan L N, Ghosal D, Yang Q. Approximate analysis of single and multiple ring networks.IEEE Trans. on Computers, 1989, C-38(7): 1022–1040.
Das C R, Bhuyan L N. Bandwidth availability of multiple-bus multiprocessors.IEEE Trans. on Computers, 1985, C-34(3): 279–283.
Dowd P W. High performance interprocessor communication through optical wavelength division multiple access channels. InProc. of Int’l Symp. on Computer Architecture, 1991, pp. 96–105.
Guo G, Melhem R G. Embedding binary X-trees and pyramids in processor arrays with spanning buses.IEEE Trans. on Parallel and Distributed Systems, 1994, 5(6): 664–672.
Guo Z, Melhem R G, Hall R W, Chiarulli D M, Levitan D M. Pipelined communications in optically interconnected arrays.Journal of Parallel and Distributed Computing, 1991, 269–282.
Hennessy J. Scalable multiprocessors and the dash approach. InLeaders in Computer Science and Electrical Engineering, The Distinguished Lecture Series IV, University Video Communications, 1992.
Huang N-F, Wu C-S. An efficient transmission scheduling algorithm for a wavelength reusable local lightwave network.Journal of Lightwave Technology, 1994, 12(7): 1278–1290.
Jiang H, Smith K C. A partial-multiple-bus computer structure with improved cost-effectiveness. InProc. of The 15th Int’l Symp. on Computer Architecture, May 30–June 2, 1988, Honolulu, Hawaii, pp. 116–122.
Kant K. Introduction to Computer System Performance Evaluation. McGraw-Hill, Inc., 1992.
Kostuk R K, Yeh J-H, Fink M. Distributed optical data bus for board-level interconnects.Applied Optics, 1993, 32(26).
Lang Tet al. Bandwidth of crossbar and multiple-bus connections for multiprocessors.IEEE Trans. on Computers, 1982, C-31(12): 1227–1233.
Levitan S P, Chiarulli D M, Melhem R G. Coincident pulse techniques for multiprocessor interconnection structures.Applied Optics, 1990, 29(14): 2024–2033.
Garrett M W, Li S Q. A study of slot reuse in dual bus multiple access networks.IEEE Journal on Selected Areas in Communications 1991, 9(2).
Loucks W M, Hamacher V C, Preiss B R, Wong L. Short-packet transfer performance on local area ring networks.IEEE Trans. on Computers, 1985, C-34(11): 1006–1014.
Melhem R G, Chiarulli D M, Levitan S P. Space multiplexing of waveguides in optically interconnected multiprocessor systems.The Computer Journal, 1989, 32(4): 362–369.
Ray S, Mukherjee S. On optimal placement of erasure nodes on a dual bus network. InProc. IEEE INFOCOMM, 1995, to appear.
Semenov M N. Performance estimation for a dual slotted bus for packet-switching nodes.Automatic Control and Computer, 1990, 24(5).
Sharon O, Segall A. On the efficiency of slot reuse in the dual bus configuration.IEEE/ACM Trans. on Networking 1994, 2(1).
Vranesic Z G, Stumm M, Lewis D M, White R. Hector: A hierarchically structured shared-memory multiprocessor.IEEE Computer, 1991, 24(1): 72–79.
Author information
Authors and Affiliations
Corresponding author
Additional information
Dr. Sibabrata Ray received his B.Sc. in 1985 and M.Satt. in 1987, both in statistics, from the Presidency College, Calcutta University and the Indian Statistical Institute, respectively. He received his M.Tech. in 1989 and Ph.D. in 1995, both in computer science, from the Indian Statistical Institute and the University of Nebraska-Lincoln, respectively. His research interests are parallel and distributed computing, computer architecture, networking, design and analysis of algorithms, VLSI design automation. He is currently an Assistant Professor in the Department of Computer and Information Sciences, the University of Michigan-Dearborn.
Dr. Jiang Hong received his B.Sc. in 1982 and M.A.Sc. in 1987, both in computer engineering, from the Huazhong University of Science and Technology and the University of Toronto, respectively. He received his Ph.D. degree in computer science form Texas A&M University in 1991. He joined the faculty of the Department of Computer Science and Engineering, University of Nebraska-Lincoln, in the Fall of 1991 and is currently an Assistant Professor there. His areas of research interest are computer systems architecture, performance evaluation, parallel and distributed processing, and interconnection networks. He has published extensively in the above areas. He is a member of IEEE Computer Society and ACM.
Rights and permissions
About this article
Cite this article
Ray, S., Jiang, H. Reconfigurable optical bus and performance optimization. J. of Comput. Sci. & Technol. 11, 296–312 (1996). https://doi.org/10.1007/BF02943136
Received:
Issue Date:
DOI: https://doi.org/10.1007/BF02943136