Combined Viterbi detector for a balanced code in page memories
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Based on the two path metrics being equal at a merged node in the trellis employed to describe a Viterbi detector for the detection of data encoded with a rate 6:8 balanced binary code in page-oriented optical memories, the combined Viterbi detector scheme is proposed to improve raw biterror rate performance by mitigating the occurrence of a twobit reversing error event in an estimated codeword for the balanced code. The effectiveness of the detection scheme is verified for different data quantizations using Monte Carlo simulations.
Key wordsholographic data storage balanced code modulation code Viterbi algorithm path metric
CLC numberTN 911. 21
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- Ashley J J, Marcus B H. Encoding and Detection of Balanced Codes.U S Patent, Electrical, 6016330, 2000-01-18.Google Scholar