Fault-tolerant design techniques in A CMP architecture

  • Yao Wen-bin
  • Wang Dong-sheng
Trusted Computing Architecture


Single-chip multiprocessor (CMP) combined with the fault-tolerant (FT) techniques offers an ideal architecture to achieve high availability on the basis of sustaining high computing performance. FT design of a single-chip multiprocessor is described, including the techniques from hardware redundancy to software support and firmware strategy. The design aims at masking the influences of errors and automatically correcting the system states.

Key words

computer architecture fault-tolerant design single-chip multiprocesor 

CLC number

TP 311 


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Copyright information

© Springer 2005

Authors and Affiliations

  • Yao Wen-bin
    • 1
    • 2
  • Wang Dong-sheng
    • 2
  1. 1.Department of Computer Science and TechnologyTsinghua UniversityBeijingChina
  2. 2.Research Institute of Information TechnologyTsinghua UniversityBeijingChina

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