Hardware Implementation of GaN-HEMT Based ZVS DC–DC Converter Considering PCB Layout

  • Dongmyoung Joo
  • Hyun-Bin Kim
  • Byoung-Kuk Lee
  • Jong-Soo Kim
Original Article


The gallium nitride high electron mobility transistors (GaN HEMT) are among the most promising power semiconductor devices. However, these transistors have a small gate voltage margin compared with conventional power devices. In this paper, the gate voltage of GaN HEMTs is mathematically analyzed when it is applied to a zero voltage switching (ZVS) phase-shift full bridge (PSFB) DC–DC converter. The analysis accounts for nonlinear capacitance characteristics under the ZVS switching condition, and a critical parasitic inductance are derived to restrict the gate voltage to a safety operation area. The optimal layout for bridge topologies and gate drivers is proposed, to satisfy the derived parasitic inductance limitation. A 500-W-power laboratory phase-shift full-bridge DC–DC converter is implemented to verify the proposed layout.


GaN HEMT Wide bandgap device Switching devices Resonant DC–DC converter PCB layout 



This work is supported by the National Research Foundation of Korea (NRF) grant funded by the Korean Government (NRF-2017R1D1A1B03033140) and Industrial Technology Innovation Program through the Ministry of Trade, Industry and Energy (MOTIE) (2018201010650A).


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Copyright information

© The Korean Institute of Electrical Engineers 2019

Authors and Affiliations

  • Dongmyoung Joo
    • 2
  • Hyun-Bin Kim
    • 1
  • Byoung-Kuk Lee
    • 3
  • Jong-Soo Kim
    • 1
  1. 1.Division of Electric EngineeringDaejin UniversityPocheonSouth Korea
  2. 2.Intelligent Mechatronics Research CenterKorea Electronics Technology InstituteSeongnamSouth Korea
  3. 3.Department of Electrical and Computer EngineeringSungkyunkwan UniversitySeoulSouth Korea

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