Reduced switches multilevel inverter integration with boost converters in photovoltaic system
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Abstract
Multilevel inverters (MLIs) are developed to meet medium voltage and high power applications in flexible power systems. The conventional configuration of multilevel inverter requires more switches and has limitation to its wide range application. This paper reports the performed work on 1-phase 7-level reduced switch multilevel inverter (RS MLI) in photovoltaic (PV) system. RS MLI configuration integration with PV system which uses less number of switching components for specified number of voltage output levels as compared to that of conventional multilevel inverter topology. To performed enhanced operation of PV cells and maximize the solar energy extraction an incremental conductance based maximum power point tracking scheme is used. To improve the quality of RS MLI output parameters mainly total harmonic distortion and switching losses, selected harmonic elimination based genetic algorithm method is consider for control the gating pulse of PV based RS MLI. This work is performed using MATLAB/SIMULINK software.
Keywords
Reduced switch multilevel inverter (RS MLI) Maximum power point tracking (MPPT) Incremental conductance (IC) Genetic algorithm (GA) Total harmonic distortion (THD)1 Introduction
Due to conventional energy production shortage of fossil fuels and environmental problems caused by, solar power has become most popular. To meet the modern time solar-electric-energy generation is consistently growing by 20–25% (percent) per year over the past 20 years [1]. Photovoltaic (PV) devices produce electric power directly from sunlight by an electronic method that occurs naturally in certain types of material, called semiconductors. The semiconductor device that transforms solar light in form of electrical energy is termed PV cell, and the phenomenon is named as ‘PV effects’. The size a solar PV array, cells are mounting up in structure of series–parallel formation for mandatory energy. The voltage outputs of PV arrays vary with change in irradiation and environmental changes. Therefore a MPPT control technique with boost converter is taken to produce the maximum voltage from PV array. In recent years, various control techniques have been proposed for tracking the maximum power point (MPP). Perturbation and observation (P&O) technique is broadly used in the MPPT controllers owing to its simplicity and easy execution. P&O is work based an iterative technique in this operating point at regular interval is perturbed and it thus oscillates around the point dP/dV = 0 i.e., MPP. Incremental conductance (IC) technique has been used to enhance the tracking accuracy and dynamic performance when quickly change in atmospheric environment [2]. It can identify when the MPPT reaches the MPP and stops process of perturbing the operating point to track quickly decreasing and increasing irradiance conditions with superior precision than P&O technique. In this work, a novel IC MPPT method is used with the adaptive variation of step size. An adjustment coefficient is adopted to regulate the step size. Therefore, the PV system can keep a large step size when the operating point is far from the MPP and a decreasing step size when the operating point is close to the MPP, even under extreme irradiance change [3]. IC MPPT method can effectively solve the problem of traditional method not taking into account the stability and dynamic response speed simultaneously when the irradiance changes tremendously. Compared with other variable step size methods, the proposed method also has less complex adjustment coefficient and computation to improve the computing speed [4].
The obtained voltage output from PV arrays is less as compared to the voltage rating of most other networks, hence a DC–DC boost converter is used. Basically the output voltage of PV array with boost converter is DC and for commercial purposes it needs to be converted into AC form because most of the loads are AC. MLIs acts main function in PV system to convert the produced DC voltage to AC voltage, to be fed into the load.
Various conventional topologies of MLIs are used for conversion of DC to AC such as neutral point clamped MLI (NPC MLI), flying capacitor MLI (FC MLI) and cascaded H-bridge MLI (CHB MLI) [5, 6]. NPC MLI requires more no. of diodes and the no. of capacitors requires in the FC MLI is more because of voltage balancing requirement. The traditional NPC MLI is integrated with PV system, but voltage across each capacitor needs to be maintained and an external controller is required for this Panda et al. [7]. CHB MLI is suitable for PV panels but it requires more no. of PV panels in series or parallel connection when the no. of levels increases. Therefore no. of switches of CHB MLI increases when the level of inverter increases. The no. of switches in MLI defines cost, the size of the circuit, reliability and complexity. So the key element in designing MLI is the no. of switches required against the required voltage level. To obtain the same output obtained as in a 7-level CHB MLI, a new circuit topology has been developed with reduced no. of switches without increasing the no. of H-bridges [8].
SHE technique solves different non-linear equations and gives better optimal results for MLIs [6]. In the work reported in this present manuscript, the “selected harmonic elimination” (SHE) technique is used to reduce selected lower harmonics such as 5th and 7th from the voltage output of MLIs. Furthermore, this paper reports the work on PV based reduced switch 7-level MLI topology, which using less switches, requires less no. of devices involves less expenditure and still RS MLI produces same voltage output as produced by CHB MLI and.
Investigations [9] have explained different methods to reduce harmonics using pulse width modulation (PWM) technique and selected harmonic elimination (SHE) method. Lower-order harmonics are dominant in nature and complete elimination of these harmonics is not possible using conventional PWM techniques. SHE also called programmed PWM technique approach is thus used to eliminate selected harmonics by calculating optimal switching angles [10]. Switching angles are calculated by solving transcendental non-linear equations. Iterative methods such as Newton–Raphson (NR) method [11] and mathematical resultant theory method suffer from some disadvantages. The former approach requires good initial guess and gives only a few sets of solution. The degree of polynomial becomes large when the later approach is applied to higher level asymmetrical MLIs as the no. of harmonics to be eliminated increases. Active harmonic elimination (AHM) technique is a further combinational method of NR and resultant theory method for reducing any no. of selected harmonics. However, AHM technique doesn’t find satisfactory possible solution for the infeasible modulation index. Thus, bio inspired optimization method such as GA (Genetic Algorithm) based selected harmonic elimination is used in this paper to improve the system robustness as suggested in Sen et al. [12] and Madhusudhana et al. [13].
GA is competent for solving constrained and unconstrained optimization problems based on proper selection of original population and progressively frequently modify this individual population for solutions [14]. By GA, obtaining optimized switching angles of PV based 7-level RS MLI, this work attempts to obtain minimum THD.
This paper proposes a 1-ϕ RS MLI integrated with photovoltaic panel. The objective of the proposed RS MLI is to increase the output voltage level with reduced the no. of switches. A novel IC MPPT technique with DC–DC boost converter is utilized for replacing each DC input of proposed RS MLI. The utilization of separate DC–DC converter is by eliminating the extra controller to balance the DC link voltage.
The organization of paper description is follows: Sect. 2 describes the structure and modeling of PV panel. Section 3 shows the configuration of DC–DC boost converter to sustain the stable load voltage between the PV array and inverter. To understand the need of Novel IC based MPPT technique to generate maximum power from the PV panel is described in Sects. 4. 1-ϕ PV integrated RS MLI configuration with its different operating mode and its switching schemes are described in Sects. 5 and 6, respectively. Selective harmonic elimination (SHE) technique is described in Sect. 7. Section 8 describes the GA based optimization technique to achieve the best possible values of switching angles by SHE technique. Results obtained using IC MPPT with DC–DC boost converter, without DC–DC boost converter and PV based 7-level RS MLI voltage output with reduced total harmonic distortion are presented in Sect. 9. Section 10 describes the conclusion of this paper.
2 Modeling of PV cell
By far, the simplest approach is the single diode model i.e. a current source in parallel to a diode as shown in Fig. 1 a where the output of the current source is directly proportional to the light falling on the cell. This model only requires three parameters to completely characterize the I–V curve, namely short-circuit current (Isc), open circuit voltage (Voc) and diode ideality factor “a” [16]. In fact, single diode model does not adequately represent the behaviour of the cell when subjected to environmental variation, especially at low voltage. An improvement of this model is done by the inclusion of one series resistance, Rs. This model is known widely as the Rs-model. Due to its simplicity and computational efficiency, the Rs -model is by far the most widely used model in PV system simulation.
Here, I_{PV,n} indicates the nominal value of PV cell output current. R_{P} and R_{S} represent parallel and series solar resistance, respectively. V_{t} symbolize the thermal voltage, V_{OC,n} and I_{SC,n} denotes the voltage of open circuit and value of nominal current, respectively. K_{V} and K_{I} indicates the voltage of short circuit and current coefficient, respectively. r and r_{n} indicate the irradiation of device surface and nominal irradiation. ∆_{t} indicates the difference between normal temperature and actual temperature.
3 DC–DC boost converter configuration
When PV array is combined with boost converter, it is examine that with increase the duty cycle, average current of PV array also increases and a PV array output voltage decrease. Therefore raising the D, results in movement of the operational point to the left of the PV array V–I characteristic. Similarly decrease in the D results in decrease in PV array average current and PV array output voltage increases. It results in operating point changing to the right of PV array. Incremental conductance (IC) MPPT technique is used to automatically vary the value of D for DC–DC converter to produced stable DC voltage at RS MLI terminal.
4 IC based MPPT technique
IC method for MPP
Before MPP | After MPP | At MPP |
---|---|---|
\(\frac{\Delta P}{\Delta V} > 0\;{\text{or}}\;\frac{dP}{dV} + \frac{1}{V} > 0\) | \(\frac{\Delta P}{\Delta V} < 0\;{\text{or}}\;\frac{dP}{dV} + \frac{1}{V} < 0\) | \(\frac{\Delta P}{\Delta V} = 0\;{\text{or}}\;\frac{dP}{dV} + \frac{1}{V} = 0\) |
As shown in Fig. 4. R_{ref} is the reference voltage at which the PV array is forced to operate. At the MPP, R_{ref} equal to Vmpp. Once the MPPT reached, the operation of PV array is maintained at this point unless a change in dI noticed, indicating a change in meteorological conditions and the MPP. The algorithm decrements or increments R_{ref} using a constant adjustment step width (P_{a}) to track the new MPP [4].
5 Reduced switch multilevel inverter (RS MLI)
Case a T_{1} is ON, flow of current is through diode D_{1} and D_{2}, and switches SW_{1} and SW_{2}. The output voltage across the load is + V_{dc1}. Correspondingly when SW_{3} and SW_{4} are switched ON, output voltage across load is − V_{dc1}.
Case b Switch T_{2} is on in this case, current flows through diode D_{2} and switches SW_{1} and SW_{2}. The output voltage across load is + V_{dc2}. correspondingly when SW_{3} and SW_{4} are switched ON, output voltage across load is − V_{dc2}.
Case c In this mode T_{3} is ON, current flows through SW_{1} and SW_{2}. The output voltage across load is + V_{dc3} and D_{1} and D_{2} reverse biased. Correspondingly when SW_{3} and SW_{4} are switched ON, voltage output is − V_{dc3}.
Case d In this mode both SW_{1} and SW_{3} or SW_{2} and SW_{4} are ON making T_{1}, T_{2} and T_{3} OFF, voltage gives zero output across the load.
Switching schemes of 7-level RS MLI
Switching state | T_{1} | T_{2} | T_{3} | SW_{1} | SW_{2} | SW_{3} | SW_{4} | D_{1} | D_{2} |
---|---|---|---|---|---|---|---|---|---|
V_{dc3} | OFF | OFF | ON | ON | OFF | OFF | OFF | ✕ | ✕ |
V_{dc2} | OFF | ON | OFF | ON | ON | OFF | OFF | ✕ | ✓ |
V_{dc1} | ON | OFF | OFF | ON | ON | OFF | OFF | ✓ | ✓ |
0 | 0FF | OFF | OFF | ON | OFF | ON | OFF | ✕ | ✕ |
0 | OFF | OFF | OFF | OFF | ON | OFF | ON | ✕ | ✕ |
− V_{dc1} | ON | OFF | OFF | OFF | OFF | ON | ON | ✓ | ✓ |
− V_{dc2} | OFF | ON | OFF | ON | OFF | OFF | ON | ✕ | ✓ |
− V_{dc3} | OFF | 0FF | ON | OFF | OFF | ON | ON | ✕ | ✕ |
6 Comparison of proposed RS MLI topology with state-of-art topologies
Figure 9b shown the comparison of the no. of DC voltage sources for DC MLI, FC MLI, CHB MLI and RS MLI structures. For appreciating N_{l} voltage levels, CHB MLI and RS MLI topology needs (N_{l} − 1)/2 voltage sources DC, where DC MLI and FC MLI necessity only one DC source with (N_{l} − 1) DC bus capacitors. However, the RS MLI structure not need clamping diodes or clamping capacitors like a CHB-MLI. But, DC MLI requires (N_{l} − 1) × (N_{l} − 2) additional clamping diodes per phase and FC-MLI requires (N_{l} − 1) × (N_{l} − 2)/2 clamping capacitors per phase.
Figure 9c indicates the coefficient variation of the G_{c} with respect to N_{l} levels of voltage. The structure of CHB MLI has high value of G_{c} as related to the DC MLI and FC MLI structure. The RS MLI structure has lower value of G_{c} coefficient than the CHB MLI structure. It is indicating the size and overall cost in designing the RS MLI is reduced than the conventional and other H-bridge based MLI structure. In Fig. 9c the no. of diodes and clamping capacitors are not considered into account when calculating the value of G_{c}. So, it is lesser for DC MLI and FC MLI structure. But, the total cost of DC MLI and FC MLI structure is more than CHB MLI and RS MLI.
Isolated DC sources are usually required to produce the multiple voltage steps at the output. Few MLIs designed based on reducing the DC source count consists of capacitors. Figure 10c shows most of the MLIs require same source count (DC source and capacitors) except the MLIs T1 and T3.
7 PV integrated 1-phase reduced switch multilevel inverter (RS MLI)
8 Selected harmonic elimination (SHE) technique
9 Switching angles calculation by genetic algorithm (GA) using SHE
Obtained results from genetic algorithm
No. of iteration fitness (%) | Switching angles (°) | Mean fitness (%) | Best | |||
---|---|---|---|---|---|---|
Results obtained from (GA) | 100 | α_{1} | α_{2} | α_{3} | 19.22 | 9.86 |
12.56 | 59.34 | 62.87 |
Obtained values for switching angles (in Table 1) satisfy the Eq. (17) for the considered no. of population. In the work of paper switches of RS MLI made by IGBTs and angles of IGBTs apply through pulse generators. Performed simple with require less derivations and systematic appearance for reduction of harmonics as the no. of levels increases. Therefore GA technique is taken for obtain optimal value of switching angles.
10 Results and analysis
The work presented in this manuscript is performed on the PV based DC–DC boost converter along with IC MPPT technique incorporated with RS MLI using MATLAB/SIMULINK software. A DC–DC boost converter is an adepter controlling the load power through a regulated duty cycle The proposed system, each PV panel is individually connected to input of RS MLI via separate DC–DC converter with MPPT technique under changing irradiation and temperature. Figure 13a is shows the output voltage and current of PV system without boost converter. According to ADP1612 and ADP1613 have a maximum duty cycle of DC to DC boost converter is 90%. In this paper work three DC to DC converters for each PV panels and optimal duty cycle find out of each converter i.e. converter 1 is 0.811, converter 2 is 0.812 and converter 3 is 0.811. Therefore the output voltage of DC–DC converter is improved from 88 to 450 V approximately for each PV panel shown in Fig. 13b.
The lower order harmonics components are reduced from the experimental output voltage of RS MLI shown in Fig. 17c. The harmonics components present in experimental output voltage is 10.73%. The proposed RS MLI also operates satisfactorily with varying frequency. The developed RS MLI can be a good solution for integrating it with renewable energy sources and for generating higher voltage steps using the reduced number of switches [11]. So far the performance of the proposed RS MLI for PV application is validated through extensive simulation and experimental analysis followed by detailed of technical design and economic aspects.
11 Conclusion
This paper present 1-ϕ PV based 7-level RS MLI with DC–DC boost converters and IC MPPT technique. The most important feature of PV based RS MLI system is being expedient for increasing the number of output levels with fewer number of switches, thereby reducing the volume, size and cost of multilevel inverter. The GA based SHE technique is used to control the switching pulses of IGBTs for multilevel inverter. By GA technique optimal switching angles are generated in order to eliminate dominant lower order harmonics. From the results it is observed that GA technique is more effective in reduction of THD at the voltage output of PV based RS MLI. In this work, 100 iterations are selected at GA toolbox for obtaining the optimal values of switching angles. The developed topology is investigated through several MATLAB simulations as well as experimental tests in the laboratory applying the modified control approach. In the future work, the proposed PV based RS MLI compare with conventional cascaded H-Bridge MLI in terms of THD analysis of output voltage.
Notes
Compliance with ethical standards
Conflict of interest
The authors declare that they have no conflict of interest.
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