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Optimized designs of low loss non-blocking optical router for ONoC applications

  • Bharat S. ChaudhariEmail author
  • S. S. Patil
Original Research
  • 3 Downloads

Abstract

Recently, optical network on chip (ONoC) has attracted the attention of researchers as a promising technology for low power and high bandwidth on chip communication. ONoC improves the computational efficiency of multi-core processors and chips. However, their performance suffers from power losses and limited scalability. In this paper, we present two innovative designs of five port non-blocking ONoC routers constructed by using micro-ring resonators and waveguides for low power losses and the optimum number of components. We compared the performance of the designed routers with previously reported optical routers for the power insertion loss and the requirement of micro-ring resonators. The result shows that proposed optical routers have the lowest power losses and require a lower number of micro-ring resonators. First proposed router has 1.3% lower average loss and 9.8% lower maximum port to port loss as compared to Cygnus router. The second proposed router has 4.8% lower average loss than Cygnus router. The results also show that the performance of both the routers is far better than the crossbar router. The second proposed router requires only fifteen micro-ring resonators, that is 6% lower than Cygnus router.

Keywords

Crossbar Cygnus Optical network on chip Optical router Micro-ring resonator Non-blocking 

Notes

Compliance with ethical standards

Conflict of interest

All authors declare that they have no conflict of interest.

References

  1. 1.
    Imre K (2016) Dual-mode routing approach for photonic network on chip platforms. J Supercomput 72(3):904–925CrossRefGoogle Scholar
  2. 2.
    Guo P, Hou W, Guo L, Yang Q, Ge Y, Liang H (2018) Low Insertion Loss and Non-Blocking Microring-Based Optical Router for 3D Optical Network-on-Chip. IEEE Photonics J 10(2):1–10CrossRefGoogle Scholar
  3. 3.
    Horowitz MA, Alon E, Patil D, Naffziger S, Kumar R, Bernstei K (2005) Scaling, power, and the future of CMOS. In: IEEE International Electron Devices Meeting IEDM Technical Digest, pp 7–15.  https://doi.org/10.1109/IEDM.2005.1609253
  4. 4.
    Xie Y, Xu W, Zhao W, Huang Y, Song T, Guo M (2015) Performance optimization and evaluation for torus-based optical networks-on-chip. IEEE J Lightwave Technol 33(18):3858–3865CrossRefGoogle Scholar
  5. 5.
    Miller DAB (2009) Device requirements for optical interconnects to silicon chips. Proc IEEE 97(7):1166–1185CrossRefGoogle Scholar
  6. 6.
    Beausoleil RG, Kuekes PJ, Snider GS, Wang SY, Williams RS (2008) Nanoelectronic and nanophotonic interconnect. Proc IEEE 96(2):230–247CrossRefGoogle Scholar
  7. 7.
    Nicolescu G, Nikdast M, Beux SL, Xu J (eds) (2017) Photonic interconnects for computing systems: understanding and pushing design challenges. River Publishers, WhartonGoogle Scholar
  8. 8.
    Poon AW, Luo X, Xu F, Chen H (2009) Cascaded microresonator based matrix switch for silicon on-chip optical interconnection. Proc IEEE 97(7):1216–1238CrossRefGoogle Scholar
  9. 9.
    Gu H, Xu J, Wang Z (2008) ODOR: a microresonator-based high performance low-cost router for optical networks-on-chip. In: Proc 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, Atlanta, pp 203-208.  https://doi.org/10.1145/1450135.1450181
  10. 10.
    Shacham A, Lee BG, Biberman A, Bergman K, Carloni LP (2007) Photonic NoC for DMA communications in chip multiprocessors. In: 15th Annual IEEE Symposium on high performance interconnects, Stanford, pp 29–38.  https://doi.org/10.1109/HOTI.2007.9
  11. 11.
    Bogaerts W, Heyn PD, Vaerenbergh TV, Vos KD, Selvaraja SK, Claes T, Dumon P, Bienstman P, Thourhout DV, Baets R (2012) Silicon microring resonators. Laser Photonics Rev 6(1):47–73CrossRefGoogle Scholar
  12. 12.
    Tan X, Yang M, Zhang L, Jiang Y, Yang J (2012) A generic optical router design for photonic network-on-chips. IEEE J Lightwave Technol 30(3):368–376CrossRefGoogle Scholar
  13. 13.
    Kazmierczak A, Bogaerts W, Drouard E, Dortu F, Rojo-Romeo P, Gaffiot F, Thourhout DV, Giannone D (2009) Highly integrated optical 4 × 4 crossbar in silicon-on-insulator technology. IEEE J Lightwave Technol 27(16):3317–3323CrossRefGoogle Scholar
  14. 14.
    Gu H, Mo KH, Xu J, Zhang W (2009) A low-power low-cost optical router for optical networks-on-chip in multiprocessor systems-on-chip. In: IEEE computer society annual symposium on VLSI, pp 19–24.  https://doi.org/10.1109/ISVLSI.2009.19
  15. 15.
    Ji R, Yang L, Zhang L, Tian Y, Ding J, Chen H, Lu Y, Zhou P, Zhu W (2011) Five-port optical router for photonic networks on-chip. Opt Express 19(21):20258–20268CrossRefGoogle Scholar
  16. 16.
    Ji R, Jiang Xu, Yang Lin (2013) Five-Port optical router based on microring switches for photonic networks-on-chip. IEEE Photonics Technol Lett 25(5):492–495CrossRefGoogle Scholar
  17. 17.
    Asadi B, Reshadi M, Khademzadeh A (2017) A routing algorithm for reducing optical loss in photonic networks-on-chip. Photonic Netw Commun 34(1):52–62CrossRefGoogle Scholar
  18. 18.
    Duong LHK, Wang Z, Nikdast M, Xu J, Yang P, Wang Z, Wang Z, Maeda RKV, Li H, Wang X, Beux SL, Thonnart Y (2016) Coherent and incoherent crosstalk noise analyses in interchip/intrachip optical interconnection networks. IEEE Trans Very Large Scale Integr Systems 24(7):2475–2487CrossRefGoogle Scholar
  19. 19.
    Bergman K, Shalf J, Hausken T (2016) Optical interconnects and extreme computing. Opt Photonics 27:32–39Google Scholar
  20. 20.
    Xiao S, Khan M, Shen H, Qi M (2007) Multiple-channel silicon micro-resonator based filters for WDM applications. Optics Express 15:7489–7498CrossRefGoogle Scholar
  21. 21.
    Poon AW, Xu F, Luo X (2008) Cascaded active silicon microresonator array cross-connect circuits for WDM networks-on-chip. Proc SPIE Int Soc Opt Eng 6898:12–21Google Scholar
  22. 22.
    Jia H, Zhou T, Fu X, Ding J, Zhang L (2018) Integrated five-port non-blocking optical router based on mode-selective property. Nanophotonics 7(5):853–858CrossRefGoogle Scholar
  23. 23.
    Zhang B, Cheng Q, Shen W, Hao Q, Zhao J (2016) A low-cost strictly non-blocking micro-ring based 4×4 on-chip optical router. In: Proc IEEE optical interconnects conference (OI), San Diego, pp 36–37.  https://doi.org/10.1109/OIC.2016.7482973
  24. 24.
    Werner S, Navaridas J, Lujan M (2017) A survey on optical network-on-chip architectures. J ACM Comput Surv 50(6):1–37CrossRefGoogle Scholar

Copyright information

© Bharati Vidyapeeth's Institute of Computer Applications and Management 2019

Authors and Affiliations

  1. 1.Department of Electronics and Telecommunication EngineeringMaharashtra Institute of TechnologyPuneIndia

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