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Technique research of event-based timing system

  • Zhi LiuEmail author
  • Ge Lei
  • Guang-Lei Xu
Review
  • 10 Downloads

Abstract

Background

The timing system of BEPC-II is established based on event generator and event receiver (EVR) modules from the Micro-Research Finland. Though it works smoothly, there are some downsides; for example, the output pulses cannot be adjusted in picosecond accuracy in EVRs, and additional hardware modules besides EVR had to be developed to generate the revolution frequency of synchrotron radiation ring of BEPC-II.

Purpose

The purpose is to research the technique details of event timing system and to develop hardware modules by ourselves using FPGA, based on which further improvement in BEPC-II timing system can be made.

Results

The homemade hardware cards have run successfully and generated synchronous trigger pulses and clocks. The jitter is under 15 ps.

Keywords

Timing system Synchronization GTX transceiver 

Notes

Compliance with ethical standards

Conflict of interest

On behalf of all authors, the corresponding author states that there is no conflict of interest.

References

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    Xilinx. Virtex-6 FPGA GTX transceivers user guide. UG366 (v2.6) (2011)Google Scholar
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    I. Konorov, H. Angerer, A. Mann, S. Paul, SODA: time distribution system for the PANDA experiment, in IEEE Nuclear Science Symposium Conference Record (NSS/MIC) (2009)Google Scholar
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    Xilinx. Virtex-6 FPGA memory resources user guide. UG363 (v1.8) (2014)Google Scholar

Copyright information

© Institute of High Energy Physics, Chinese Academy of Sciences; Nuclear Electronics and Nuclear Detection Society 2019

Authors and Affiliations

  1. 1.University of Chinese Academy of SciencesBeijingChina
  2. 2.Institute of High Energy PhysicsCASBeijingChina

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