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An Online Testing Scheme for Detection of Gate Faults in ESOP-Based Reversible Circuit

  • Bappaditya Mondal
  • Chandan BandyopadhyayEmail author
  • Anirban Bhattacharjee
  • Hafizur Rahaman
Original Contribution
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Abstract

In the present era of computation, reversible computing has emerged as promising computing paradigm before the research community. Consequently, efficient design of reversible circuit has received immense attention in design industry. But not only the cost efficient designs get the priority but developing methodologies for testing of such circuit bear high value. Emphasizing on this need, in this work, we have introduced an online testing scheme for indentifying two major gate faults—missing-gate fault and appearance fault in ESOP-based reversible designs. In the testing process, initially, the selected input function is transformed to its corresponding testable circuit in which additional gates and lines (ancillary lines) are appended in the primary design. Next, we generate fault-specific test vectors which later are executed over the circuit for identifying the possible faults present in the design. This approach has been successfully tested on a wide spectrum of benchmark specifications to ascertain its functional correctness, and the computed results are tabulated at the end of the article. Comparison with existing testing algorithms is given in the result tables, and a substantial improvement over reported work’s results is projected in those result sets.

Keywords

Exclusive-or sum-of-product (ESOPAppearance fault (AF) Missing-gate faults (MGF

Notes

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Copyright information

© The Institution of Engineers (India) 2019

Authors and Affiliations

  • Bappaditya Mondal
    • 1
  • Chandan Bandyopadhyay
    • 1
    Email author
  • Anirban Bhattacharjee
    • 1
  • Hafizur Rahaman
    • 1
  1. 1.Department of Information TechnologyIndian Institute of Engineering Science and TechnologyShibpurIndia

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