Mitigation of Threshold Voltage Shift Due to Negative Bias Temperature Instability by Exploiting Solgel-Derived TiO2 Incorporation
To ensure reliability inside complementary metal oxide semiconductor transistors, the results on the basis of negative bias temperature instability by incorporating aged TiO2 gels on SiO2 dielectric have been reported. TiO2 was chosen for the incorporation. Precursor aging has been carried out for 2, 3 and 4 days. Samples with maximum dielectric constant after aging and UV treatment were extracted. Under DC stress, exploiting cured sample (4 days aged and 3 h UV exposed) of TiO2 results in a 70% (70% decrease in threshold voltage) increase in drain current. Under AC or dynamic bias stress, exploiting cured sample (4 days aged and 3 h UV exposed) of TiO2 results in a 65% increase (65% decrease in threshold voltage).
KeywordsReliability CMOS BTI Hole trapping
This work was supported by the Bright Sparks Unit (BSU), University of Malaya (UM) and UM/MOHE HIRGA D000019-16001.
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