Compact Modeling of Fin-LDMOS Transistor Based on the Surface Potential
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One of the basic components of smart power integrated circuits (SPICs) is the laterally diffused metal oxide semiconductor (LDMOS) transistors. In this paper, we propose Fin-LDMOS transistor based on the surface potential. In order to improve the accuracy, we have taken into account not only the fin-shape structure of the gate but also the mobility reduction and saturation velocity. The proposed method is evaluated considering a broad range of biases and physical parameters of the device. The comparison between modeling results and 3D simulations confirm the remarkable accuracy of our model.
KeywordsFin-LDMOS Modeling Channel current Drift region current Surface potential
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- 1.Wei J, Luo X, Ma D, Wu J, Li Z, Zhang B (2016) Accumulation mode triple gate SOT LDMOS with ultralow on-resistance and enhanced transconductance. Proceedings of the 28th international symposium on power semiconductor devices and ICs (ISPSD)Google Scholar
- 2.Cheng S, Fang D, Qiao M, Zhang S, Zhang G, Gu Y, He Y, Zhou X, Qi Z, Li Z, Zhang B, Novel A (2017) 700V deep trench isolated double RESURF LDMOS with P-sink layer. Proceedings of the 29th international symposium on power semiconductor devices & ICsGoogle Scholar
- 11.Erlbacher T (2014) Lateral power transistors in integrated circuits. Springer, ChamGoogle Scholar
- 22.Tsividis Y (2011) Operation and modeling of the MOS transistord3rd edn. Colin McAndrew, New YorkGoogle Scholar
- 23.Atlas User’s Manual (2012) Device simulation software. Silvaco InternationalGoogle Scholar