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A Two-Dimensional (2D) Analytical Modeling and Improved Short Channel Performance of Graded-Channel Gate-Stack (GCGS) Dual-Material Double-Gate (DMDG) MOSFET

  • Narendar Vadthiya
  • Shweta Tripathi
  • R. Bhavani Shankar Naik
Original Paper
  • 28 Downloads

Abstract

A Double-gate (DG) metal-oxide-semiconductor field effect transistor (MOSFET) is emerging device architecture in sub-nanometer regime. The performance of DG MOSFET can be ameliorated by gate and channel engineering. The concept of graded-channel gate-stack (GCGS) and dual-material (DM) are incorporated in DG MOSFET. A two-dimensional (2D) analytical surface potential model for GCGS DMDG MOSFET is developed based on the solution of Poisson’s equations with appropriate boundary conditions. It has been found that analytically modeled data is in good degree of agreement with numerically simulated data. The combination of both DM and GC concept introduces a step variation in potential profile at the junction of both materials in channel region and ameliorates the short channel effects (SCEs). A suppressed subthreshold swing (SS) and drain induced barrier lowering (DIBL) has been observed in the device due to an elevated average velocity of carrier and reduced drain field effect by the use of DM and GC with GS. Further, analog/RF characteristics such as transconductance generation factor (TGF), cut-off frequency (fT) and transconductance frequency product (TFP) have been examined with different GS high-k dielectrics. The numerically simulated data has been extracted using 2D ATLAS device simulator.

Keywords

Dual-material gate (DMG) Drain induced barrier lowering (DIBL) Double-gate (DG) Graded-channel gate-stack (GCGS) Short channel effects (SCEs) 

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References

  1. 1.
    Chaudhry A, Kumar MJ (2004) IEEE Trans Device Mater Reliabil 4:99–109CrossRefGoogle Scholar
  2. 2.
    Yong KK (1989) IEEE Electron Dev Lett 36:399–402CrossRefGoogle Scholar
  3. 3.
    Park JT, Colinge JP (2002) IEEE Electron Dev Lett 49:2222–2229CrossRefGoogle Scholar
  4. 4.
    Cappy A, Carres B et al (1980) IEEE Trans Electron Devices 27:2158–2160CrossRefGoogle Scholar
  5. 5.
    Moore GE (1965) Electronics 38:114–117Google Scholar
  6. 6.
    Wong HSP (2002) IBM J Res Dev 46:133–168CrossRefGoogle Scholar
  7. 7.
    Tsui BY, Chin LF (2004) IEEE Trans Electron Devices 51:1733–1736CrossRefGoogle Scholar
  8. 8.
    The International Technology Roadmap for Semiconductors (2011) Edition. International SEMATECH, Austin. http://www.itrs.net/Links/2011ITRS/Home2011.htm
  9. 9.
    Ernst T, Cristoloveanu S et al (2003) IEEE Trans Electron Devices 50:830–838CrossRefGoogle Scholar
  10. 10.
    Kumar MJ, Chaudhry A (2004) IEEE Trans Electron Devices 51:569–574CrossRefGoogle Scholar
  11. 11.
    Ribes G, Mitard J et al (2005) IEEE Trans Electron Devices 5:5–19Google Scholar
  12. 12.
    Cheng B, Cao M et al (1999) IEEE Trans Electron Devices 46:1537–1543CrossRefGoogle Scholar
  13. 13.
    Chiang TK (2009) Microelectron Reliab 49:113–119CrossRefGoogle Scholar
  14. 14.
    Kasturi P, Saxena M et al (2008) IEEE Electron Device Lett 55:382–387CrossRefGoogle Scholar
  15. 15.
    Kaur R, Chaujar R et al (2009) Microelectron Eng 58:2005–2014CrossRefGoogle Scholar
  16. 16.
    Pradhan KP, Mohapatra SK et al (2014) Microelectron J 45:144–151CrossRefGoogle Scholar
  17. 17.
    Pavanello MA, Martino JA et al (2000) Solid State Electron 44:917–922CrossRefGoogle Scholar
  18. 18.
    Djeffal F, Meguellati M et al (2009) Physica E 41:1872–1877CrossRefGoogle Scholar
  19. 19.
    Pavanello MA, Martino JA et al (1999) In: Proceedings of IEEE international SOI conference, vol 99, pp 293–298Google Scholar
  20. 20.
    Zhou X, Long W (1998) IEEE Trans Electron Devices 45:2546–2548CrossRefGoogle Scholar
  21. 21.
    Long W, Ou H et al (1999) IEEE Trans Electron Devices 46:865–870CrossRefGoogle Scholar
  22. 22.
    Reddy GV, Kumar MJ (2005) IEEE Trans Nanotechnol 4:260–268CrossRefGoogle Scholar
  23. 23.
    Narendar V, Rai S et al (2016) J Comput Electron 15:1316–1325CrossRefGoogle Scholar
  24. 24.
    Chiang T-K (2009) Microelectron Reliab 49:693–698CrossRefGoogle Scholar
  25. 25.
    Goel K., Saxena M et al (2006) IEEE Trans Electron Devices 53:623–1633CrossRefGoogle Scholar
  26. 26.
    Saxena M, Haldar S et al (2002) IEEE Trans Electron Devices 49:1928–1938CrossRefGoogle Scholar
  27. 27.
    Narendar V, Rai S et al (2016) Superlattice Microst 100:274–289CrossRefGoogle Scholar
  28. 28.
    Razavi P, Orouji A (2008) Proc Adv Electron Microelectron 11–14Google Scholar
  29. 29.
    Chen M-L, Lin W-K et al (2009) J Appl Phys 48:104503(1-7)Google Scholar
  30. 30.
    Goel E, Kumar S et al (2016) IEEE Trans Electron Devices 63:966–973CrossRefGoogle Scholar
  31. 31.
    Sahay S, Kumar MJ (2016) IEEE Trans Electron Devices 63:4138–4142CrossRefGoogle Scholar
  32. 32.
    Nigam K, Pandey S et al (2017) IEEE Trans Electron Devices 64:2751–275CrossRefGoogle Scholar
  33. 33.
    Silvaco International, Atlas Unser’s Manual Device Simulation Software Santa Clara: Silvaco International: 2012Google Scholar

Copyright information

© Springer Science+Business Media B.V., part of Springer Nature 2018

Authors and Affiliations

  • Narendar Vadthiya
    • 1
  • Shweta Tripathi
    • 1
  • R. Bhavani Shankar Naik
    • 1
  1. 1.Department of Electronics and Communication EngineeringMotilal Nehru National Institute of Technology AllahabadAllahabadIndia

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