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Cluster Computing

, Volume 22, Supplement 3, pp 5563–5572 | Cite as

WCET optimization strategy based on source code refactoring

  • Fanqi Meng
  • Xiaohong SuEmail author
Article

Abstract

For safety-critical real-time software, if worst-case execution time (WCET) violates a time constraint, it is considered having a timeliness defect. To fix the defect early with lower cost, a WCET optimization strategy is proposed based on source code refactoring. The strategy guides programmers to search refactoring opportunities in the correct positions and perform refactorings by a reasonable sequence. To this end, the worst-case execution path (WCEP) of a target program is firstly extracted from its control flow graph. Then the WCEP is mapped onto source code by the back-annotation technique. An abstract syntax tree-based invariant path identification algorithm is developed for recognizing the invariant paths from the source-level WCEP. According to the invariant paths and loop statements, the source code is divided into four optimization regions with different priorities. Thus the searching scopes are reduced, and invalid refactorings are avoided. On the basis, the refactoring which has the lowest cost in the same region is performed first. To support the strategy, a cost model of source code refactoring is designed. It mainly considers adverse effects of refactorings on the maintainability of source code. The experimental results showed that the optimization strategy reduced WCET effectively and maximally kept the maintainability. Therefore it is more suitable for WCET optimization in an early programming phase. It is helpful to fix the defects early and then guarantee the timeliness safety of the software.

Keywords

Cyber-physical system Software safety Code refactoring Performance optimization Optimization strategy 

Notes

Acknowledgements

This work was supported by “the 13th Five-Year” National Science and Technology Major Project of China (Grant No. 2017YFC0702204), the national natural science foundation of China (Nos. 61672191 and 61173021).

References

  1. 1.
    Li, X., Liang, Y., Mitra, T., et al.: Chronos: a timing analyzer for embedded software. Sci. Comput. Program. 69(1), 56–67 (2007)MathSciNetCrossRefGoogle Scholar
  2. 2.
    Jin, E., Jin, Y., Chen, Y., et al.: Study on the new integrated protection of intelligent substations. J. Northeast Electr. Power Univ. 36(6), 25–29 (2016)Google Scholar
  3. 3.
    Yang, M., Huang, B., et al.: Real-time prediction for wind power based on kalman filter and support vector mahines. J. Northeast Electr. Power Univ. 37(2), 45–51 (2017)Google Scholar
  4. 4.
    Meng, F., Su, X., Qu, Z.: Interactive WCET prediction with warning for timeout risk. Int. J. Pattern Recognit. Artif. Intell. 31(05), 1750012 (2017)CrossRefGoogle Scholar
  5. 5.
    Milutinovic, S., Abella, J., Cazorla, F.J.: On the assessment of probabilistic WCET estimates reliability for arbitrary program. EURASIP J. Embed. Syst. 2017(1), 28 (2017)CrossRefGoogle Scholar
  6. 6.
    Altenbernd, P., Gustafsson, J., Lisper, B., et al.: Early execution time-estimation through automatically generated timing models. Real-Time Syst. 52(6), 731–760 (2016)CrossRefGoogle Scholar
  7. 7.
    Harmon, T., Schoeberl, M., Kirner, R., et al.: Fast, interactive worst-case execution time analysis with back-annotation. IEEE Trans. Ind. Inform. 8(2), 366–377 (2012)CrossRefGoogle Scholar
  8. 8.
    Fowler, M., Beck, K.: Refactoring: Improving the Design of Existing Code. Addison-Wesley Professional, Boston (1999)Google Scholar
  9. 9.
    Meng, F., Su, X., Qu, Z.: Nonlinear approach for estimating WCET during programming phase. Clust. Comput. 19(3), 1449–1459 (2016)CrossRefGoogle Scholar
  10. 10.
    Oehlert, D., Luppold, A., Falk, H.: Practical challenges of ILP-based SPM allocation optimizations. In: Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, pp. 86–89. ACM (2016)Google Scholar
  11. 11.
    Mittal, S.: A survey of techniques for cache locking. ACM Trans. Des. Autom. Electronic Syst. (TODAES) 21(3), 49 (2016)Google Scholar
  12. 12.
    Yan, J., Zhang, W.: WCET analysis of instruction caches with prefetching. In: ACM SIGPLAN Notices, vol. 42, no. 7, pp. 175–184 . ACM (2007)Google Scholar
  13. 13.
    Hepp, S., Schoeberl, M.: Worst-case execution time based optimization of real-time Java programs. In: IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC), vol. 2012, pp. 64–70 (2012)Google Scholar
  14. 14.
    Lokuciejewski, P., Falk, H., Marwedel, P., et al.: WCET-driven, code-size critical procedure cloning. In: Proceedings of the 11th international workshop on Software & Compilers for Embedded Systems, pp. 21–30 . ACM (2008)Google Scholar
  15. 15.
    Kafshdooz, M.M., Taram, M., Assadi, S., et al.: A compile-time optimization method for WCET reduction in real-time embedded systems through block formation. ACM Tran. Archit. Code Optim. 12(4), 66 (2016)Google Scholar
  16. 16.
    Suhendra, V., Mitra, T., Roychoudhury, A., et al.: WCET centric data allocation to scratchpad memory. In: 26th IEEE International Real-Time Systems Symposium, p. 232 (RTSS 2005) (2005)Google Scholar
  17. 17.
    Falk, H., Kleinsorge. J.C.: Optimal static WCET-aware scratchpad allocation of program code. In: Proceedings of the 46th Annual Design Automation Conference, pp. 732–737. ACM (2009)Google Scholar
  18. 18.
    Luppold, A., Kittsteiner, C., Falk, H.: Cache-aware instruction spm allocation for hard real-time systems. In: Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, pp. 77–85. ACM (2016)Google Scholar
  19. 19.
    Liu, T., Li, M., Xue, C.J.: Minimizing WCET for real-time embedded systems via static instruction cache locking. In: 15th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2009), pp. 35–44 (2009)Google Scholar
  20. 20.
    Ding, H., Liang, Y., Mitra, T.: WCET-centric dynamic instruction cache locking. In: Design, Automation and Test in Europe Conference and Exhibition (DATE), pp. 1–6 (2014)Google Scholar
  21. 21.
    Dongen, W., Pan, N., Jicheng, C., et al.: Basic-block based instruction prefetching technology for real-time system. J. Softw. 27(9), 2426–2442 (2016)MathSciNetGoogle Scholar
  22. 22.
    Lokuciejewski, P., Gedikli, F., Marwedel, P., et al.: Automatic WCET reduction by machine learning based heuristics for function inlining. In: 3rd Workshop on Statistical and Machine Learning Approaches to Architectures and Compilation (SMART), pp. 1–15 (2009)Google Scholar
  23. 23.
    Lokuciejewski, P., Plazar, S., Falk, H.: Approximating Pareto optimal compiler optimization sequences—a trade-off between WCET, ACET and code size. Software 41(12), 1437–1458 (2011)Google Scholar
  24. 24.
    Falk, H., Lokuciejewski, P., Theiling, H.: Design of a wcet-aware c compiler. In: Proceedings of the 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia, pp. 121–126. IEEE Computer Society (2006)Google Scholar
  25. 25.
    Falk, H., Lokuciejewski, P.: A compiler framework for the reduction of worst-case execution times. Real Time Syst. 46(2), 251–300 (2010)CrossRefGoogle Scholar
  26. 26.
    Yang, S., Su, X., Wang, T., et al.: Design and implementation of lexical and syntax analysis tool CParser for C language. Intell. Comput. Appl. 4(5), 69–75 (2014)Google Scholar

Copyright information

© Springer Science+Business Media, LLC, part of Springer Nature 2017

Authors and Affiliations

  1. 1.School of Computer Science and TechnologyHarbin Institute of TechnologyHarbinChina
  2. 2.School of Information EngineeringNortheast Electric Power UniversityJilin CityChina

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