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An event detection module with a low-power, small-size CMOS image sensor with reference scaling

  • Cheonwi Park
  • Woo-Tae Kim
  • In-June Yeo
  • Moongu Jeon
  • Byung-geun LeeEmail author
Article

Abstract

This paper presents a low-power and small-size CMOS image sensor (CIS) which can be utilized as a power-efficient event detection system. Since high-resolution images are not required for most event detection purposes, power consumption and chip size of the CIS are optimized only for detection performance. The proposed reference voltage scaling with a multiple input sampling scheme allows the CIS to further minimize power consumption by removing a variable gain amplifier, which is commonly placed in a pixel readout channel. The CIS chip employing a 10 μm-pitch 3T active pixel occupies a die area of 0.98 mm × 0.84 mm. The CIS dissipates 181 μW from 3.0 V analog and 1.4 V digital supplies at the maximum frame rate of 252 fps.

Keywords

CMOS image sensor Correlated double sampling Event detection Multiple sampling Reference voltage scaling 

Notes

Acknowledgements

This work was supported by the MOTIE Research Grant of 2018 under Grant 10067764. This research was supported by the MSIT (Ministry of Science and ICT), Korea, under the ITRC (Information Technology Research Center) support program (IITP-2018-0-01433) supervised by the IITP (Institute for Information and Communications Technology Promotion).

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Copyright information

© Springer Science+Business Media, LLC, part of Springer Nature 2019

Authors and Affiliations

  1. 1.School of Electrical Engineering and Computer ScienceGwangju Institute of Science and Technology (GIST)GwangjuRepublic of Korea

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