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Circuits, Systems, and Signal Processing

, Volume 38, Issue 2, pp 512–528 | Cite as

Distributed Unique-Size MOS Technique: A Promising Universal Approach Capable of Resolving Circuit Design Bottlenecks of Modern Era

  • Khalil MonfarediEmail author
Article

Abstract

In this paper, a new universal technique based on the unique-size MOS transistors is proposed to resolve the analog circuit design bottlenecks imposed by nowadays modern technology downscaling. The method called here “distributed MOS (DMOS) technique” not only permits utilizing minimum-size transistors for analog circuit design, but also paves the way to emerging new generation of modern circuits and systems. It is proved that employing the proposed technique helps the optimum performance of the circuit to be preserved, regardless of minimum-size MOS transistors’ narrow channel effect and channel length modulation. This capability is anticipated to be logically maintained for even smaller transistors offered by future technology. The threshold and early voltage variations versus the MOS transistor channel width and length are investigated by numerical analysis of the data achieved from TSMC library for 180-nm technology using Cadence software, and the result uncertainty ascribed to them exhibited an excellent agreement with the initially developed extended MOS model. Higher linearity with lower THD is interestingly achieved for the new approach. The excellent conformity among the simulation and post-layout results verified the efficiency of the proposed design technique in practical circumstances.

Keywords

Distributed MOS (DMOS) Unique size Universal design approach MOS model Technology downscaling Early voltage variation 

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Copyright information

© Springer Science+Business Media, LLC, part of Springer Nature 2018

Authors and Affiliations

  1. 1.Department of Electrical and Electronic Engineering, Faculty of EngineeringAzarbaijan Shahid Madani UniversityTabrizIran

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