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Detection of and-parallelism in logic programs

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In this paper, we present a detection technique of and-parallelism in logic programs. The detection consists of three phases: analysis of entry modes, derivation of exit modes and determination of execution graph expressions. Compared with other techniques[2, 4, 5], our approach, with the compile- time program- level data- dependence analysis of logic programs, can efficiently exploit and- parallelism in logic programs. Two precompilers, based on our technique and DeGroot’s approach[3] respectively, have been implemented in SES- PIM system[12]. Through compiling and running some typical benchmarks in SES- PIM, we conclude that our technique can, in most cases, exploit as much and- parallelism as the dynamic approach[13] does under “producer- consumer” scheme, and needs less dynamic overhead while exploiting more and-parallelism than DeGroot’s approach does.

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Author information

Correspondence to Zhiyi Huang.

Additional information

This research was partially supported by the Fok Ying Tung Education Foundation.

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Huang, Z., Hu, S. Detection of and-parallelism in logic programs. J. of Comput. Sci. & Technol. 5, 379–387 (1990).

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  • Logic Program
  • Logic Programming
  • Entry Mode
  • Mode Table
  • Exit Mode