1. Editorial

   • Sydney R. Parker
   • Armen H. Zemanian

   EditorialNotes Pages: 123 - 123

2. Introduction to the special issue

   • Zvi M. Kedem

   EditorialNotes Pages: 125 - 126

3. Array resolutions of linear maps

   • William A. Porter
   • Jorge L. Aravena

   OriginalPaper Pages: 127 - 137

4. A technique for the design of systolic arrays with bit-level pipelining

   • B. B. Madan
   • S. R. Parker
   • M. Zubair

   OriginalPaper Pages: 139 - 151

5. Fault-tolerant VLSI sorters

   • P. J. Varman
   • I. V. Ramakrishnan
   • D. S. Fussell

   OriginalPaper Pages: 153 - 174

6. Construction of a fault-tolerant grid of processors for wafer-scale integration

   • Alessandro Zorat

   OriginalPaper Pages: 175 - 189

7. Applications of VLSI technology in a massively parallel machine

   • David Elliot Shaw

   OriginalPaper Pages: 191 - 215

8. Designing VLSI network nodes to reduce memory traffic in a shared memory parallel computer

   • Susan Dickey
   • Allan Gottlieb
   • Yue -Sheng Liu

   OriginalPaper Pages: 217 - 238

9. Active memory chips: A brief survey and case study

   • David Elliot Shaw
   • Theodore M. Sabety

   OriginalPaper Pages: 239 - 259