Skip to main content

A Multi-node Dynamic Reconfigurable Computing System with Distributed Reconfiguration Controller

  • Conference paper
  • First Online:
Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing (FPL 2000)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1896))

Included in the following conference series:

  • 627 Accesses

Abstract

This paper reports the implementation of a multi-node dynamically reconfigurable computing system. The system is based on a scalable dynamic reconfigurable computing node which consists of three resource layers. Scalability of the system is introduced on some of those layers in order to deal with context synchronization aspects. This approach leads to a multi-node reconfigurable computing architecture with a distributed reconfiguration controller, which helps in hiding the reconfiguration and synchronization cost partially.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. M.Sliman Kadi et al, A fast FPGA prototyping system that uses inexpensive high peformance FPIC, proc. of ACM/SIGDA works Field Programmable Gate Array’s 1994.

    Google Scholar 

  2. XC4000E series, Xilinx, The programmable logic Databook

    Google Scholar 

  3. XC6200, Xilinx, Databook

    Google Scholar 

  4. Abdellah Touhafi, W. Brissinck, E.F. Dirkx, A Scalable Run Time Reconfigurable Architecture, Proceedings of the X IFIP international conference on VLSI, VLSI 99, December 1999 Lisboa Portugal.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2000 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Touhafi, A. (2000). A Multi-node Dynamic Reconfigurable Computing System with Distributed Reconfiguration Controller. In: Hartenstein, R.W., Grünbacher, H. (eds) Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing. FPL 2000. Lecture Notes in Computer Science, vol 1896. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44614-1_51

Download citation

  • DOI: https://doi.org/10.1007/3-540-44614-1_51

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-67899-1

  • Online ISBN: 978-3-540-44614-9

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics